Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
185703 |
1 |
|
|
T7 |
1009 |
|
T8 |
2288 |
|
T34 |
1691 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
102883 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
58119 |
1 |
|
|
T7 |
33 |
|
T8 |
65 |
|
T34 |
50 |
seven_bytes |
3603 |
1 |
|
|
T7 |
39 |
|
T8 |
60 |
|
T34 |
47 |
six_bytes |
3531 |
1 |
|
|
T7 |
32 |
|
T8 |
62 |
|
T34 |
43 |
five_bytes |
3574 |
1 |
|
|
T7 |
27 |
|
T8 |
61 |
|
T34 |
60 |
four_bytes |
3485 |
1 |
|
|
T7 |
22 |
|
T8 |
60 |
|
T34 |
45 |
three_bytes |
3567 |
1 |
|
|
T7 |
21 |
|
T8 |
59 |
|
T34 |
42 |
two_bytes |
3506 |
1 |
|
|
T7 |
22 |
|
T8 |
71 |
|
T34 |
45 |
one_byte |
3435 |
1 |
|
|
T7 |
28 |
|
T8 |
42 |
|
T34 |
43 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182315 |
1 |
|
|
T7 |
993 |
|
T8 |
2264 |
|
T34 |
1669 |
auto[1] |
3388 |
1 |
|
|
T7 |
16 |
|
T8 |
24 |
|
T34 |
22 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
185703 |
1 |
|
|
T7 |
1009 |
|
T8 |
2288 |
|
T34 |
1691 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
185684 |
1 |
|
|
T7 |
1009 |
|
T8 |
2288 |
|
T34 |
1691 |
auto[1] |
19 |
1 |
|
|
T43 |
1 |
|
T163 |
1 |
|
T51 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1128 |
1 |
|
|
T7 |
2 |
|
T8 |
5 |
|
T34 |
3 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3388 |
1 |
|
|
T7 |
16 |
|
T8 |
24 |
|
T34 |
22 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180388 |
1 |
|
|
T7 |
803 |
|
T8 |
2198 |
|
T34 |
2388 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
98654 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
58373 |
1 |
|
|
T7 |
17 |
|
T8 |
58 |
|
T34 |
61 |
seven_bytes |
3349 |
1 |
|
|
T7 |
26 |
|
T8 |
53 |
|
T34 |
74 |
six_bytes |
3366 |
1 |
|
|
T7 |
25 |
|
T8 |
57 |
|
T34 |
65 |
five_bytes |
3335 |
1 |
|
|
T7 |
19 |
|
T8 |
68 |
|
T34 |
63 |
four_bytes |
3398 |
1 |
|
|
T7 |
20 |
|
T8 |
60 |
|
T34 |
50 |
three_bytes |
3407 |
1 |
|
|
T7 |
16 |
|
T8 |
54 |
|
T34 |
66 |
two_bytes |
3210 |
1 |
|
|
T7 |
17 |
|
T8 |
52 |
|
T34 |
60 |
one_byte |
3296 |
1 |
|
|
T7 |
27 |
|
T8 |
40 |
|
T34 |
59 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
177092 |
1 |
|
|
T7 |
791 |
|
T8 |
2172 |
|
T34 |
2360 |
auto[1] |
3296 |
1 |
|
|
T7 |
12 |
|
T8 |
26 |
|
T34 |
28 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180388 |
1 |
|
|
T7 |
803 |
|
T8 |
2198 |
|
T34 |
2388 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180377 |
1 |
|
|
T7 |
803 |
|
T8 |
2198 |
|
T34 |
2388 |
auto[1] |
11 |
1 |
|
|
T40 |
1 |
|
T164 |
1 |
|
T165 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1112 |
1 |
|
|
T8 |
1 |
|
T34 |
6 |
|
T45 |
13 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3296 |
1 |
|
|
T7 |
12 |
|
T8 |
26 |
|
T34 |
28 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
351004 |
1 |
|
|
T12 |
3 |
|
T7 |
1587 |
|
T8 |
5124 |
auto[1] |
557 |
1 |
|
|
T51 |
62 |
|
T52 |
76 |
|
T53 |
36 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
192135 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
113541 |
1 |
|
|
T12 |
3 |
|
T7 |
51 |
|
T8 |
132 |
seven_bytes |
6679 |
1 |
|
|
T7 |
35 |
|
T8 |
138 |
|
T34 |
79 |
six_bytes |
6553 |
1 |
|
|
T7 |
37 |
|
T8 |
139 |
|
T34 |
100 |
five_bytes |
6428 |
1 |
|
|
T7 |
43 |
|
T8 |
114 |
|
T34 |
90 |
four_bytes |
6586 |
1 |
|
|
T7 |
44 |
|
T8 |
130 |
|
T34 |
93 |
three_bytes |
6622 |
1 |
|
|
T7 |
42 |
|
T8 |
164 |
|
T34 |
91 |
two_bytes |
6480 |
1 |
|
|
T7 |
42 |
|
T8 |
137 |
|
T34 |
93 |
one_byte |
6537 |
1 |
|
|
T7 |
37 |
|
T8 |
138 |
|
T34 |
97 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
344990 |
1 |
|
|
T12 |
3 |
|
T7 |
1565 |
|
T8 |
5054 |
auto[1] |
6571 |
1 |
|
|
T7 |
22 |
|
T8 |
70 |
|
T34 |
46 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
351561 |
1 |
|
|
T12 |
3 |
|
T7 |
1587 |
|
T8 |
5124 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
351537 |
1 |
|
|
T12 |
3 |
|
T7 |
1586 |
|
T8 |
5124 |
auto[1] |
24 |
1 |
|
|
T7 |
1 |
|
T45 |
1 |
|
T36 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2206 |
1 |
|
|
T7 |
2 |
|
T8 |
9 |
|
T34 |
9 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6571 |
1 |
|
|
T7 |
22 |
|
T8 |
70 |
|
T34 |
46 |