Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	266609785	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

191752710

1

T1

3384

T2

10572

T3

164

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	237297831	1			T1	2395		T2	11558		T3	87
values[0x0]	106187272	1			T1	820		T2	2808		T3	55
values[0x1]	114877392	1			T1	903		T2	3082		T3	62

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	207171261	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

251191234

1

T1

3582

T2

12200

T3

177

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1430842	1			T1	1		T2	69		T4	3
valid_sources[0x01]	1424048	1			T2	74		T12	3465		T13	3625
valid_sources[0x02]	1429758	1			T1	1		T2	76		T12	3287
valid_sources[0x03]	1424570	1			T2	72		T3	2		T12	3425
valid_sources[0x04]	1481095	1			T1	1		T2	65		T3	3
valid_sources[0x05]	1612464	1			T2	78		T12	3389		T13	3156
valid_sources[0x06]	1441512	1			T2	62		T3	2		T12	3500
valid_sources[0x07]	1426013	1			T2	75		T12	3454		T13	3833
valid_sources[0x08]	1427151	1			T2	65		T12	3459		T13	3286
valid_sources[0x09]	1566330	1			T2	76		T12	3398		T13	3716
valid_sources[0x0a]	3811033	1			T1	1		T2	54		T4	5
valid_sources[0x0b]	1425574	1			T1	1		T2	67		T3	1
valid_sources[0x0c]	1424923	1			T2	66		T3	1		T12	3411
valid_sources[0x0d]	2021536	1			T1	1		T2	69		T12	3385
valid_sources[0x0e]	1483644	1			T2	63		T12	3647		T13	3289
valid_sources[0x0f]	1447421	1			T2	59		T12	3376		T13	3568
valid_sources[0x10]	1902809	1			T2	69		T12	3475		T13	3595
valid_sources[0x11]	1529913	1			T1	1		T2	60		T3	3
valid_sources[0x12]	1498614	1			T2	60		T12	3487		T13	3673
valid_sources[0x13]	1434697	1			T2	66		T12	3465		T13	3615
valid_sources[0x14]	1598186	1			T1	1		T2	70		T12	3536
valid_sources[0x15]	1439161	1			T2	81		T3	3		T12	3525
valid_sources[0x16]	3772900	1			T2	57		T12	3446		T5	1
valid_sources[0x17]	1437683	1			T1	1		T2	66		T3	1
valid_sources[0x18]	1431538	1			T2	62		T12	3458		T13	3345
valid_sources[0x19]	2066216	1			T2	72		T3	1		T12	3587
valid_sources[0x1a]	1430619	1			T2	74		T12	3390		T13	3294
valid_sources[0x1b]	1429524	1			T2	88		T12	3491		T13	3671
valid_sources[0x1c]	1427580	1			T2	74		T12	3457		T13	3869
valid_sources[0x1d]	2083103	1			T2	75		T12	3346		T13	3363
valid_sources[0x1e]	1419618	1			T2	66		T3	3		T12	3401
valid_sources[0x1f]	1917501	1			T2	68		T3	1		T4	6
valid_sources[0x20]	1431216	1			T2	81		T3	2		T12	3445
valid_sources[0x21]	1435482	1			T1	1		T2	59		T3	1
valid_sources[0x22]	1430216	1			T2	80		T12	3472		T13	3505
valid_sources[0x23]	2310065	1			T2	65		T12	3457		T13	3514
valid_sources[0x24]	1426563	1			T2	71		T12	3397		T5	1
valid_sources[0x25]	1429903	1			T2	67		T3	2		T12	3450
valid_sources[0x26]	1430871	1			T2	52		T12	3405		T13	3491
valid_sources[0x27]	1861376	1			T2	70		T4	1		T12	3451
valid_sources[0x28]	1431449	1			T2	67		T3	1		T4	4
valid_sources[0x29]	1434385	1			T2	66		T3	2		T12	3320
valid_sources[0x2a]	6093255	1			T1	1		T2	77		T3	2
valid_sources[0x2b]	1426367	1			T2	86		T3	1		T12	3512
valid_sources[0x2c]	1433598	1			T2	87		T12	3541		T13	3404
valid_sources[0x2d]	1432104	1			T2	65		T12	3348		T13	3746
valid_sources[0x2e]	1426175	1			T1	1		T2	71		T3	2
valid_sources[0x2f]	1445247	1			T2	68		T3	1		T12	3498
valid_sources[0x30]	1485911	1			T2	81		T3	3		T12	3375
valid_sources[0x31]	1610921	1			T2	66		T12	3582		T13	3235
valid_sources[0x32]	1510536	1			T2	68		T3	2		T12	3460
valid_sources[0x33]	2327740	1			T2	59		T12	3522		T13	3243
valid_sources[0x34]	1423446	1			T1	1		T2	56		T12	3333
valid_sources[0x35]	1549939	1			T2	80		T3	1		T4	1
valid_sources[0x36]	1433024	1			T1	1		T2	64		T3	2
valid_sources[0x37]	1430523	1			T2	77		T12	3576		T13	3678
valid_sources[0x38]	1889193	1			T2	65		T3	2		T4	1
valid_sources[0x39]	4246069	1			T1	1		T2	71		T12	3502
valid_sources[0x3a]	1896444	1			T1	1		T2	77		T3	1
valid_sources[0x3b]	1424636	1			T2	61		T12	3466		T13	3741
valid_sources[0x3c]	2055849	1			T2	54		T12	3500		T5	1
valid_sources[0x3d]	1889928	1			T2	59		T12	3420		T5	1
valid_sources[0x3e]	1422723	1			T2	55		T3	1		T12	3475
valid_sources[0x3f]	1426192	1			T2	60		T12	3519		T13	3391
valid_sources[0x40]	1435457	1			T2	62		T12	3414		T5	1
valid_sources[0x41]	2297789	1			T2	69		T12	3394		T13	3558
valid_sources[0x42]	1425521	1			T1	1		T2	67		T3	4
valid_sources[0x43]	1600989	1			T2	73		T3	3		T12	3588
valid_sources[0x44]	1430190	1			T2	66		T3	1		T12	3416
valid_sources[0x45]	3367010	1			T2	78		T3	1		T4	3
valid_sources[0x46]	1428350	1			T2	66		T12	3380		T13	3689
valid_sources[0x47]	1424526	1			T2	67		T12	3470		T13	3362
valid_sources[0x48]	1622160	1			T1	1		T2	72		T12	3416
valid_sources[0x49]	1598900	1			T2	63		T3	5		T12	3362
valid_sources[0x4a]	1431444	1			T2	70		T3	1		T12	3352
valid_sources[0x4b]	3769609	1			T2	83		T12	3401		T5	1
valid_sources[0x4c]	1433029	1			T2	63		T12	3401		T5	1
valid_sources[0x4d]	2404241	1			T1	1		T2	61		T3	3
valid_sources[0x4e]	1442464	1			T2	74		T3	1		T4	1
valid_sources[0x4f]	1567498	1			T2	59		T12	3350		T5	1
valid_sources[0x50]	1426937	1			T2	52		T3	6		T12	3613
valid_sources[0x51]	1416493	1			T2	75		T12	3408		T5	1
valid_sources[0x52]	1769065	1			T2	65		T12	3505		T5	2
valid_sources[0x53]	2283067	1			T2	59		T12	3419		T13	3100
valid_sources[0x54]	3183051	1			T2	65		T4	6		T12	3391
valid_sources[0x55]	2280730	1			T1	1		T2	61		T12	3379
valid_sources[0x56]	2158896	1			T2	59		T12	3439		T13	3211
valid_sources[0x57]	1432888	1			T2	56		T3	1		T12	3444
valid_sources[0x58]	2279411	1			T2	70		T3	1		T4	2
valid_sources[0x59]	1427160	1			T2	64		T12	3334		T13	3440
valid_sources[0x5a]	1428380	1			T2	66		T3	1		T12	3502
valid_sources[0x5b]	1423023	1			T1	1		T2	77		T3	1
valid_sources[0x5c]	1479712	1			T2	75		T12	3496		T13	3530
valid_sources[0x5d]	1445151	1			T2	61		T12	3434		T5	1
valid_sources[0x5e]	1435449	1			T2	74		T3	1		T12	3522
valid_sources[0x5f]	1433655	1			T2	55		T12	3484		T13	3190
valid_sources[0x60]	1499710	1			T2	49		T12	3616		T13	3572
valid_sources[0x61]	1431623	1			T2	68		T12	3537		T5	2
valid_sources[0x62]	1432914	1			T2	63		T3	2		T12	3362
valid_sources[0x63]	1425491	1			T2	66		T12	3503		T13	3600
valid_sources[0x64]	1429633	1			T2	64		T12	3425		T13	3638
valid_sources[0x65]	3462893	1			T2	58		T12	3542		T5	1
valid_sources[0x66]	1436508	1			T2	60		T4	7		T12	3393
valid_sources[0x67]	2605785	1			T1	1		T2	73		T3	1
valid_sources[0x68]	1518656	1			T1	1		T2	66		T3	1
valid_sources[0x69]	3421251	1			T2	63		T12	3392		T13	3701
valid_sources[0x6a]	1490266	1			T2	77		T3	3		T4	2
valid_sources[0x6b]	1970682	1			T2	66		T3	2		T12	3402
valid_sources[0x6c]	1458268	1			T2	82		T4	1		T12	3457
valid_sources[0x6d]	1430572	1			T2	59		T12	3434		T5	1
valid_sources[0x6e]	1504323	1			T2	72		T3	1		T12	3362
valid_sources[0x6f]	1431465	1			T2	76		T12	3503		T13	3447
valid_sources[0x70]	1431539	1			T2	63		T3	2		T12	3459
valid_sources[0x71]	1417500	1			T2	66		T3	1		T12	3505
valid_sources[0x72]	1433592	1			T2	58		T12	3576		T13	3598
valid_sources[0x73]	3054106	1			T2	72		T4	2		T12	3346
valid_sources[0x74]	2087134	1			T2	69		T12	3349		T13	3275
valid_sources[0x75]	3524438	1			T2	71		T3	3		T12	3422
valid_sources[0x76]	1893835	1			T1	1		T2	61		T3	1
valid_sources[0x77]	1432786	1			T2	83		T3	6		T12	3578
valid_sources[0x78]	1481969	1			T2	68		T3	1		T12	3466
valid_sources[0x79]	1884769	1			T2	49		T3	1		T12	3504
valid_sources[0x7a]	1894541	1			T2	67		T12	3424		T13	3273
valid_sources[0x7b]	1436799	1			T1	2		T2	65		T4	4
valid_sources[0x7c]	2577654	1			T2	64		T12	3505		T13	3427
valid_sources[0x7d]	1487642	1			T2	74		T4	1		T12	3529
valid_sources[0x7e]	2076975	1			T2	73		T12	3499		T13	3333
valid_sources[0x7f]	1433231	1			T2	72		T4	1		T12	3426
valid_sources[0x80]	1425709	1			T2	55		T4	1		T12	3295

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

74326209

1

T1

1997

T2

7244

T3

72

values[0x0]

all_enables

biggest_size

63044099

1

T1

694

T2

1773

T3

43

values[0x1]

all_enables

biggest_size

54382402

1

T1

693

T2

1555

T3

49