Unified Coverage Report :: Group :: dv_base_reg_pkg::mubi_cov#(4,32'h00000006,32'h00000009)::mubi_cg

Group : dv_base_reg_pkg::mubi_cov#(4,32'h00000006,32'h00000009)::mubi_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if	100.00	1	100	1	64	64
mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if	100.00	1	100	1	64	64

---

Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

---

Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	540	1			T21	11		T32	37		T33	24
others[1]	589	1			T21	12		T32	44		T33	24
others[2]	566	1			T21	12		T32	40		T33	19
others[3]	919	1			T21	19		T32	70		T33	33
false	346305	1			T1	1		T2	1		T3	158
true	342910	1			T3	157		T4	9		T5	9

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	547	1			T21	7		T32	46		T33	22
others[1]	546	1			T21	10		T32	41		T33	20
others[2]	598	1			T21	11		T32	41		T33	20
others[3]	923	1			T21	26		T32	63		T33	38
false	346294	1			T1	1		T2	1		T3	158
true	342899	1			T3	157		T4	9		T5	9