Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164314 |
1 |
|
|
T1 |
2271 |
|
T5 |
690 |
|
T14 |
2725 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
82903 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
61522 |
1 |
|
|
T1 |
56 |
|
T5 |
680 |
|
T14 |
2684 |
seven_bytes |
2804 |
1 |
|
|
T1 |
54 |
|
T33 |
42 |
|
T35 |
11 |
six_bytes |
2933 |
1 |
|
|
T1 |
64 |
|
T33 |
54 |
|
T35 |
4 |
five_bytes |
2953 |
1 |
|
|
T1 |
57 |
|
T33 |
30 |
|
T35 |
3 |
four_bytes |
2796 |
1 |
|
|
T1 |
71 |
|
T33 |
48 |
|
T35 |
5 |
three_bytes |
2859 |
1 |
|
|
T1 |
71 |
|
T33 |
36 |
|
T35 |
3 |
two_bytes |
2768 |
1 |
|
|
T1 |
59 |
|
T33 |
24 |
|
T35 |
5 |
one_byte |
2776 |
1 |
|
|
T1 |
61 |
|
T33 |
31 |
|
T35 |
2 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
161048 |
1 |
|
|
T1 |
2241 |
|
T5 |
670 |
|
T14 |
2643 |
auto[1] |
3266 |
1 |
|
|
T1 |
30 |
|
T5 |
20 |
|
T14 |
82 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164314 |
1 |
|
|
T1 |
2271 |
|
T5 |
690 |
|
T14 |
2725 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164301 |
1 |
|
|
T1 |
2271 |
|
T5 |
690 |
|
T14 |
2725 |
auto[1] |
13 |
1 |
|
|
T172 |
1 |
|
T64 |
1 |
|
T173 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1149 |
1 |
|
|
T1 |
4 |
|
T5 |
10 |
|
T14 |
41 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3266 |
1 |
|
|
T1 |
30 |
|
T5 |
20 |
|
T14 |
82 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
177575 |
1 |
|
|
T1 |
823 |
|
T5 |
650 |
|
T14 |
2547 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
89675 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
66305 |
1 |
|
|
T1 |
28 |
|
T5 |
641 |
|
T14 |
2508 |
seven_bytes |
3108 |
1 |
|
|
T1 |
18 |
|
T33 |
60 |
|
T35 |
10 |
six_bytes |
3110 |
1 |
|
|
T1 |
24 |
|
T33 |
70 |
|
T35 |
12 |
five_bytes |
3124 |
1 |
|
|
T1 |
19 |
|
T33 |
70 |
|
T35 |
8 |
four_bytes |
3046 |
1 |
|
|
T1 |
15 |
|
T33 |
57 |
|
T35 |
8 |
three_bytes |
3063 |
1 |
|
|
T1 |
24 |
|
T33 |
66 |
|
T35 |
6 |
two_bytes |
3117 |
1 |
|
|
T1 |
21 |
|
T33 |
64 |
|
T35 |
8 |
one_byte |
3027 |
1 |
|
|
T1 |
23 |
|
T33 |
58 |
|
T35 |
8 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174129 |
1 |
|
|
T1 |
811 |
|
T5 |
632 |
|
T14 |
2469 |
auto[1] |
3446 |
1 |
|
|
T1 |
12 |
|
T5 |
18 |
|
T14 |
78 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
177575 |
1 |
|
|
T1 |
823 |
|
T5 |
650 |
|
T14 |
2547 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
177562 |
1 |
|
|
T1 |
822 |
|
T5 |
650 |
|
T14 |
2547 |
auto[1] |
13 |
1 |
|
|
T1 |
1 |
|
T46 |
1 |
|
T17 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1212 |
1 |
|
|
T5 |
9 |
|
T14 |
39 |
|
T31 |
7 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3446 |
1 |
|
|
T1 |
12 |
|
T5 |
18 |
|
T14 |
78 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
370531 |
1 |
|
|
T1 |
3090 |
|
T5 |
1515 |
|
T14 |
4650 |
auto[1] |
630 |
1 |
|
|
T14 |
83 |
|
T23 |
67 |
|
T24 |
88 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
199201 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
124475 |
1 |
|
|
T1 |
88 |
|
T5 |
1491 |
|
T14 |
4650 |
seven_bytes |
6828 |
1 |
|
|
T1 |
72 |
|
T33 |
139 |
|
T35 |
46 |
six_bytes |
6706 |
1 |
|
|
T1 |
73 |
|
T33 |
133 |
|
T35 |
47 |
five_bytes |
6879 |
1 |
|
|
T1 |
95 |
|
T33 |
164 |
|
T35 |
52 |
four_bytes |
6763 |
1 |
|
|
T1 |
76 |
|
T33 |
123 |
|
T35 |
56 |
three_bytes |
6885 |
1 |
|
|
T1 |
89 |
|
T33 |
117 |
|
T35 |
47 |
two_bytes |
6727 |
1 |
|
|
T1 |
75 |
|
T33 |
139 |
|
T35 |
51 |
one_byte |
6697 |
1 |
|
|
T1 |
68 |
|
T33 |
127 |
|
T35 |
42 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
364280 |
1 |
|
|
T1 |
3058 |
|
T5 |
1467 |
|
T14 |
4567 |
auto[1] |
6881 |
1 |
|
|
T1 |
32 |
|
T5 |
48 |
|
T14 |
166 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
371161 |
1 |
|
|
T1 |
3090 |
|
T5 |
1515 |
|
T14 |
4733 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
371136 |
1 |
|
|
T1 |
3090 |
|
T5 |
1514 |
|
T14 |
4732 |
auto[1] |
25 |
1 |
|
|
T5 |
1 |
|
T14 |
1 |
|
T29 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2300 |
1 |
|
|
T1 |
5 |
|
T5 |
24 |
|
T14 |
83 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6881 |
1 |
|
|
T1 |
32 |
|
T5 |
48 |
|
T14 |
166 |