Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
187501 |
1 |
|
|
T2 |
1 |
|
T12 |
429 |
|
T61 |
2169 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
102401 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
60666 |
1 |
|
|
T2 |
1 |
|
T12 |
422 |
|
T61 |
2132 |
seven_bytes |
3446 |
1 |
|
|
T67 |
2 |
|
T49 |
20 |
|
T72 |
37 |
six_bytes |
3580 |
1 |
|
|
T49 |
25 |
|
T72 |
43 |
|
T71 |
30 |
five_bytes |
3414 |
1 |
|
|
T49 |
34 |
|
T72 |
32 |
|
T71 |
33 |
four_bytes |
3499 |
1 |
|
|
T67 |
1 |
|
T49 |
33 |
|
T72 |
41 |
three_bytes |
3423 |
1 |
|
|
T49 |
27 |
|
T72 |
31 |
|
T71 |
32 |
two_bytes |
3513 |
1 |
|
|
T49 |
36 |
|
T72 |
42 |
|
T71 |
40 |
one_byte |
3559 |
1 |
|
|
T49 |
27 |
|
T72 |
52 |
|
T71 |
42 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
184137 |
1 |
|
|
T2 |
1 |
|
T12 |
415 |
|
T61 |
2095 |
auto[1] |
3364 |
1 |
|
|
T12 |
14 |
|
T61 |
74 |
|
T60 |
26 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
187501 |
1 |
|
|
T2 |
1 |
|
T12 |
429 |
|
T61 |
2169 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
187492 |
1 |
|
|
T2 |
1 |
|
T12 |
429 |
|
T61 |
2169 |
auto[1] |
9 |
1 |
|
|
T60 |
1 |
|
T175 |
1 |
|
T176 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1136 |
1 |
|
|
T12 |
7 |
|
T61 |
37 |
|
T60 |
13 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3364 |
1 |
|
|
T12 |
14 |
|
T61 |
74 |
|
T60 |
26 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
193035 |
1 |
|
|
T12 |
545 |
|
T61 |
2147 |
|
T60 |
550 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
101159 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
67973 |
1 |
|
|
T12 |
535 |
|
T61 |
2104 |
|
T60 |
540 |
seven_bytes |
3452 |
1 |
|
|
T67 |
2 |
|
T49 |
76 |
|
T72 |
57 |
six_bytes |
3421 |
1 |
|
|
T67 |
2 |
|
T49 |
71 |
|
T72 |
53 |
five_bytes |
3453 |
1 |
|
|
T67 |
3 |
|
T49 |
84 |
|
T72 |
54 |
four_bytes |
3339 |
1 |
|
|
T67 |
1 |
|
T49 |
62 |
|
T72 |
59 |
three_bytes |
3404 |
1 |
|
|
T67 |
3 |
|
T49 |
76 |
|
T72 |
61 |
two_bytes |
3366 |
1 |
|
|
T67 |
1 |
|
T49 |
67 |
|
T72 |
55 |
one_byte |
3468 |
1 |
|
|
T67 |
4 |
|
T49 |
62 |
|
T72 |
58 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
189420 |
1 |
|
|
T12 |
525 |
|
T61 |
2061 |
|
T60 |
530 |
auto[1] |
3615 |
1 |
|
|
T12 |
20 |
|
T61 |
86 |
|
T60 |
20 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
193035 |
1 |
|
|
T12 |
545 |
|
T61 |
2147 |
|
T60 |
550 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
193028 |
1 |
|
|
T12 |
545 |
|
T61 |
2147 |
|
T60 |
550 |
auto[1] |
7 |
1 |
|
|
T177 |
1 |
|
T169 |
1 |
|
T178 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1231 |
1 |
|
|
T12 |
10 |
|
T61 |
43 |
|
T60 |
10 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3615 |
1 |
|
|
T12 |
20 |
|
T61 |
86 |
|
T60 |
20 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
380317 |
1 |
|
|
T12 |
1010 |
|
T61 |
4566 |
|
T60 |
1263 |
auto[1] |
441 |
1 |
|
|
T61 |
70 |
|
T62 |
37 |
|
T63 |
13 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
206174 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
125489 |
1 |
|
|
T12 |
995 |
|
T61 |
4566 |
|
T60 |
1241 |
seven_bytes |
6958 |
1 |
|
|
T67 |
9 |
|
T49 |
117 |
|
T72 |
128 |
six_bytes |
7069 |
1 |
|
|
T67 |
6 |
|
T49 |
116 |
|
T72 |
119 |
five_bytes |
7080 |
1 |
|
|
T67 |
3 |
|
T49 |
126 |
|
T72 |
120 |
four_bytes |
7012 |
1 |
|
|
T67 |
6 |
|
T49 |
119 |
|
T72 |
115 |
three_bytes |
7036 |
1 |
|
|
T67 |
4 |
|
T49 |
94 |
|
T72 |
119 |
two_bytes |
7007 |
1 |
|
|
T67 |
7 |
|
T49 |
102 |
|
T72 |
107 |
one_byte |
6933 |
1 |
|
|
T67 |
4 |
|
T49 |
110 |
|
T72 |
107 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
373638 |
1 |
|
|
T12 |
980 |
|
T61 |
4496 |
|
T60 |
1219 |
auto[1] |
7120 |
1 |
|
|
T12 |
30 |
|
T61 |
140 |
|
T60 |
44 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
380758 |
1 |
|
|
T12 |
1010 |
|
T61 |
4636 |
|
T60 |
1263 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
380734 |
1 |
|
|
T12 |
1010 |
|
T61 |
4636 |
|
T60 |
1262 |
auto[1] |
24 |
1 |
|
|
T60 |
1 |
|
T49 |
1 |
|
T179 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2366 |
1 |
|
|
T12 |
15 |
|
T61 |
70 |
|
T60 |
22 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
7120 |
1 |
|
|
T12 |
30 |
|
T61 |
140 |
|
T60 |
44 |