Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	260332847	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

185093336

1

T1

1128

T2

927821

T3

361822

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	230721372	1			T1	717		T2	115167		T3	130758
values[0x0]	103107760	1			T1	520		T2	547339		T3	149639
values[0x1]	111597051	1			T1	518		T2	584113		T3	149446

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	202259468	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

243166715

1

T1

1273

T2

122052

T3

379689

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1344047	1			T1	3		T2	9090		T3	2185
valid_sources[0x01]	1341711	1			T1	8		T2	9301		T3	2482
valid_sources[0x02]	1804022	1			T1	7		T2	8810		T3	1345
valid_sources[0x03]	1344023	1			T1	7		T2	8497		T3	2211
valid_sources[0x04]	1351442	1			T1	4		T2	9382		T3	1949
valid_sources[0x05]	1448023	1			T1	11		T2	8853		T3	1117
valid_sources[0x06]	1790072	1			T1	8		T2	8782		T3	1569
valid_sources[0x07]	1341545	1			T1	5		T2	8915		T3	1259
valid_sources[0x08]	1340029	1			T1	7		T2	8802		T3	1250
valid_sources[0x09]	1351374	1			T1	4		T2	9190		T3	999
valid_sources[0x0a]	1646481	1			T1	5		T2	8810		T3	1930
valid_sources[0x0b]	2475736	1			T1	7		T2	8795		T3	2173
valid_sources[0x0c]	1345895	1			T1	3		T2	8766		T3	2315
valid_sources[0x0d]	1366303	1			T1	5		T2	8713		T3	1368
valid_sources[0x0e]	2831766	1			T1	2		T2	8588		T3	1893
valid_sources[0x0f]	1339833	1			T1	4		T2	9039		T3	1287
valid_sources[0x10]	2000586	1			T1	14		T2	9029		T3	1833
valid_sources[0x11]	1350354	1			T1	8		T2	8700		T3	1376
valid_sources[0x12]	1346138	1			T1	10		T2	8873		T3	1325
valid_sources[0x13]	1343697	1			T1	5		T2	8750		T3	1356
valid_sources[0x14]	1347794	1			T1	9		T2	8899		T3	1801
valid_sources[0x15]	1336702	1			T1	5		T2	8602		T3	1289
valid_sources[0x16]	1338974	1			T1	5		T2	8537		T3	1899
valid_sources[0x17]	1409130	1			T1	12		T2	9185		T3	1434
valid_sources[0x18]	3338532	1			T1	8		T2	8517		T3	1719
valid_sources[0x19]	1799151	1			T1	8		T2	8800		T3	1331
valid_sources[0x1a]	1340762	1			T1	8		T2	8945		T3	2695
valid_sources[0x1b]	2474136	1			T1	15		T2	8888		T3	1267
valid_sources[0x1c]	1469396	1			T1	8		T2	8760		T3	1219
valid_sources[0x1d]	1339765	1			T1	8		T2	9277		T3	1173
valid_sources[0x1e]	1344143	1			T1	4		T2	9012		T3	1310
valid_sources[0x1f]	2200474	1			T1	8		T2	8534		T3	1231
valid_sources[0x20]	1345148	1			T1	8		T2	8901		T3	1324
valid_sources[0x21]	1343879	1			T1	10		T2	8919		T3	1705
valid_sources[0x22]	2183639	1			T1	6		T2	9081		T3	2175
valid_sources[0x23]	3800950	1			T1	8		T2	8713		T3	1806
valid_sources[0x24]	1548334	1			T1	9		T2	8997		T3	1855
valid_sources[0x25]	1347420	1			T1	5		T2	8967		T3	1202
valid_sources[0x26]	1371834	1			T1	8		T2	9297		T3	2253
valid_sources[0x27]	1341761	1			T2	8898		T3	1399		T4	1111
valid_sources[0x28]	1338819	1			T1	13		T2	8525		T3	1401
valid_sources[0x29]	1343656	1			T1	12		T2	8968		T3	2095
valid_sources[0x2a]	1348847	1			T1	4		T2	9135		T3	1208
valid_sources[0x2b]	2144448	1			T1	4		T2	8712		T3	1105
valid_sources[0x2c]	1348081	1			T1	8		T2	9099		T3	1391
valid_sources[0x2d]	1345663	1			T1	4		T2	8796		T3	1168
valid_sources[0x2e]	1340175	1			T1	16		T2	8779		T3	1774
valid_sources[0x2f]	1554432	1			T1	7		T2	8943		T3	2326
valid_sources[0x30]	1342301	1			T1	6		T2	9038		T3	1436
valid_sources[0x31]	1351326	1			T1	9		T2	9091		T3	1651
valid_sources[0x32]	1343465	1			T1	2		T2	8876		T3	1601
valid_sources[0x33]	2196826	1			T1	4		T2	8946		T3	1334
valid_sources[0x34]	1350747	1			T1	8		T2	9138		T3	1403
valid_sources[0x35]	1341284	1			T1	8		T2	8409		T3	1892
valid_sources[0x36]	1374990	1			T1	4		T2	9005		T3	1990
valid_sources[0x37]	1938198	1			T1	8		T2	8861		T3	1288
valid_sources[0x38]	1560181	1			T1	5		T2	8975		T3	1727
valid_sources[0x39]	1812377	1			T1	4		T2	8878		T3	1269
valid_sources[0x3a]	1698826	1			T1	6		T2	8886		T3	1357
valid_sources[0x3b]	1347469	1			T1	8		T2	8841		T3	2875
valid_sources[0x3c]	1344563	1			T1	5		T2	8813		T3	1289
valid_sources[0x3d]	1347167	1			T1	2		T2	8987		T3	1566
valid_sources[0x3e]	1350617	1			T1	9		T2	9009		T3	2753
valid_sources[0x3f]	2289023	1			T1	8		T2	8925		T3	2821
valid_sources[0x40]	1345777	1			T1	8		T2	8846		T3	1358
valid_sources[0x41]	1341651	1			T1	4		T2	8898		T3	2212
valid_sources[0x42]	1344663	1			T1	3		T2	9250		T3	1765
valid_sources[0x43]	3326749	1			T1	5		T2	9059		T3	1843
valid_sources[0x44]	1347019	1			T1	4		T2	9044		T3	1374
valid_sources[0x45]	1892749	1			T1	7		T2	9012		T3	1830
valid_sources[0x46]	1342782	1			T1	5		T2	8917		T3	1243
valid_sources[0x47]	3683054	1			T1	10		T2	8767		T3	1264
valid_sources[0x48]	1338590	1			T1	3		T2	8922		T3	1440
valid_sources[0x49]	1343522	1			T1	4		T2	9249		T3	2304
valid_sources[0x4a]	1341939	1			T1	8		T2	8822		T3	1373
valid_sources[0x4b]	1366552	1			T1	9		T2	8992		T3	1888
valid_sources[0x4c]	1348530	1			T1	5		T2	8857		T3	1272
valid_sources[0x4d]	1340998	1			T1	8		T2	9107		T3	2003
valid_sources[0x4e]	1412814	1			T1	8		T2	8918		T3	1021
valid_sources[0x4f]	1346856	1			T1	4		T2	8703		T3	2084
valid_sources[0x50]	1797753	1			T1	2		T2	8771		T3	1200
valid_sources[0x51]	1812947	1			T1	9		T2	8934		T3	1989
valid_sources[0x52]	1345852	1			T1	6		T2	9285		T3	1343
valid_sources[0x53]	1477642	1			T1	7		T2	8718		T3	1344
valid_sources[0x54]	1347744	1			T1	9		T2	8973		T3	2164
valid_sources[0x55]	3394710	1			T1	9		T2	8833		T3	1221
valid_sources[0x56]	1373413	1			T1	9		T2	8877		T3	1213
valid_sources[0x57]	1340507	1			T1	9		T2	9042		T3	1287
valid_sources[0x58]	1400455	1			T1	4		T2	8870		T3	2364
valid_sources[0x59]	1342953	1			T1	1		T2	8780		T3	1768
valid_sources[0x5a]	1361031	1			T1	5		T2	8541		T3	1224
valid_sources[0x5b]	1342927	1			T1	5		T2	8844		T3	1663
valid_sources[0x5c]	1429721	1			T1	6		T2	8662		T3	2028
valid_sources[0x5d]	1344271	1			T1	12		T2	8854		T3	1294
valid_sources[0x5e]	1487207	1			T1	4		T2	9146		T3	2334
valid_sources[0x5f]	1491453	1			T1	14		T2	8939		T3	1289
valid_sources[0x60]	1339905	1			T1	6		T2	8951		T3	1864
valid_sources[0x61]	1348967	1			T1	4		T2	9094		T3	1238
valid_sources[0x62]	1346142	1			T1	8		T2	8557		T3	2556
valid_sources[0x63]	1348831	1			T1	9		T2	8898		T3	1239
valid_sources[0x64]	1793645	1			T1	6		T2	8833		T3	1530
valid_sources[0x65]	1572490	1			T1	5		T2	8825		T3	1837
valid_sources[0x66]	1344263	1			T1	6		T2	8688		T3	2207
valid_sources[0x67]	1449190	1			T1	4		T2	8754		T3	2405
valid_sources[0x68]	1339308	1			T1	7		T2	8746		T3	1907
valid_sources[0x69]	2462449	1			T1	12		T2	9215		T3	1321
valid_sources[0x6a]	1348094	1			T1	6		T2	9120		T3	1894
valid_sources[0x6b]	1340827	1			T1	9		T2	8945		T3	2301
valid_sources[0x6c]	6324444	1			T1	4		T2	8924		T3	1892
valid_sources[0x6d]	1343859	1			T1	5		T2	8418		T3	1972
valid_sources[0x6e]	1345102	1			T1	3		T2	8920		T3	1215
valid_sources[0x6f]	1813347	1			T1	10		T2	8607		T3	1396
valid_sources[0x70]	1352044	1			T1	4		T2	9213		T3	1288
valid_sources[0x71]	3339033	1			T1	4		T2	8815		T3	1326
valid_sources[0x72]	3338445	1			T1	9		T2	9018		T3	1251
valid_sources[0x73]	2366892	1			T1	12		T2	8909		T3	1332
valid_sources[0x74]	1346306	1			T1	10		T2	9339		T3	1035
valid_sources[0x75]	1379294	1			T1	10		T2	9170		T3	1834
valid_sources[0x76]	1350232	1			T1	7		T2	9156		T3	1646
valid_sources[0x77]	1343424	1			T1	6		T2	9054		T3	1335
valid_sources[0x78]	1352521	1			T1	7		T2	8786		T3	1766
valid_sources[0x79]	3322580	1			T1	8		T2	9029		T3	1984
valid_sources[0x7a]	1343338	1			T1	8		T2	8933		T3	1826
valid_sources[0x7b]	1352395	1			T1	7		T2	8984		T3	3449
valid_sources[0x7c]	1882687	1			T1	10		T2	8809		T3	1561
valid_sources[0x7d]	1351539	1			T1	8		T2	8732		T3	1902
valid_sources[0x7e]	1343333	1			T1	7		T2	8724		T3	3264
valid_sources[0x7f]	3327182	1			T1	7		T2	8858		T3	1386
valid_sources[0x80]	1338723	1			T1	7		T2	8916		T3	1358

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

71628060

1

T1

348

T2

328785

T3

66702

values[0x0]

all_enables

biggest_size

60965825

1

T1

413

T2

322860

T3

147926

values[0x1]

all_enables

biggest_size

52499451

1

T1

367

T2

276176

T3

147194