Group : kmac_env_pkg::app_cg_wrap::app_cfg_reg_cg
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Group : kmac_env_pkg::app_cg_wrap::app_cfg_reg_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

3 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
AppKeymgr_cg_(1) 100.00 1 100 1 64 64
AppLc_cg_(1) 100.00 1 100 1 64 64
AppRom_cg_(1) 100.00 1 100 1 64 64




Group Instance : AppKeymgr_cg_(1)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance AppKeymgr_cg_(1)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance AppKeymgr_cg_(1)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
sw_configured_hash_mode 3 0 3 100.00 100 1 1 0



Group Instance : AppLc_cg_(1)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance AppLc_cg_(1)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance AppLc_cg_(1)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
sw_configured_hash_mode 3 0 3 100.00 100 1 1 0



Group Instance : AppRom_cg_(1)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance AppRom_cg_(1)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance AppRom_cg_(1)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
sw_configured_hash_mode 3 0 3 100.00 100 1 1 0


Summary for Variable sw_configured_hash_mode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for sw_configured_hash_mode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
cshake 1075 1 T23 5 T14 1 T35 1
shake 1063 1 T23 5 T31 5 T41 1
sha3 1142 1 T23 10 T14 1 T35 1


Summary for Variable sw_configured_hash_mode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for sw_configured_hash_mode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
cshake 520 1 T23 2 T14 1 T31 6
shake 478 1 T23 8 T31 7 T32 4
sha3 536 1 T4 1 T23 9 T14 1


Summary for Variable sw_configured_hash_mode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for sw_configured_hash_mode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
cshake 543 1 T23 3 T31 8 T32 6
shake 571 1 T23 5 T31 5 T32 4
sha3 585 1 T23 2 T31 4 T32 3

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