Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 262509894 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 188181564 1 T1 1062 T2 768 T3 251633



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 233220619 1 T1 73 T2 53 T3 330315
values[0x0] 104449387 1 T1 539 T2 370 T3 156757
values[0x1] 113021452 1 T1 533 T2 407 T3 170666



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 203902818 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 246788640 1 T1 1074 T2 782 T3 340813



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 2277212 1 T4 8 T5 1 T12 352
valid_sources[0x01] 1395827 1 T4 8 T5 3 T11 1
valid_sources[0x02] 1401146 1 T4 8 T5 1 T11 7
valid_sources[0x03] 1397461 1 T4 5 T5 1 T11 6
valid_sources[0x04] 2259169 1 T4 5 T5 1 T12 352
valid_sources[0x05] 1471821 1 T4 5 T11 2 T12 382
valid_sources[0x06] 1395834 1 T4 11 T5 1 T11 5
valid_sources[0x07] 1405644 1 T4 9 T11 5 T12 376
valid_sources[0x08] 1399596 1 T4 9 T12 384 T13 487
valid_sources[0x09] 1574754 1 T4 4 T5 1 T11 3
valid_sources[0x0a] 1391746 1 T4 11 T5 1 T11 1
valid_sources[0x0b] 1393428 1 T4 9 T11 1 T12 416
valid_sources[0x0c] 6068105 1 T4 11 T11 7 T12 334
valid_sources[0x0d] 1402802 1 T4 8 T5 1 T11 3
valid_sources[0x0e] 2070741 1 T4 17 T5 3 T11 8
valid_sources[0x0f] 1389742 1 T4 7 T5 2 T11 5
valid_sources[0x10] 1392736 1 T4 2 T5 3 T12 384
valid_sources[0x11] 1399102 1 T4 10 T5 1 T12 398
valid_sources[0x12] 1404390 1 T4 5 T5 2 T11 1
valid_sources[0x13] 1400521 1 T4 11 T12 383 T13 405
valid_sources[0x14] 1397284 1 T4 9 T5 1 T11 11
valid_sources[0x15] 1395369 1 T4 5 T11 2 T12 381
valid_sources[0x16] 1402152 1 T4 15 T5 2 T11 1
valid_sources[0x17] 1425273 1 T4 5 T5 4 T11 8
valid_sources[0x18] 2060119 1 T4 12 T5 1 T11 1
valid_sources[0x19] 1416909 1 T4 7 T5 1 T11 1
valid_sources[0x1a] 1845311 1 T4 6 T12 346 T13 419
valid_sources[0x1b] 1875194 1 T4 7 T5 1 T11 2
valid_sources[0x1c] 3396347 1 T4 7 T5 3 T11 10
valid_sources[0x1d] 1395126 1 T4 4 T5 2 T11 1
valid_sources[0x1e] 3729417 1 T4 7 T11 4 T12 426
valid_sources[0x1f] 1400637 1 T4 5 T5 1 T11 7
valid_sources[0x20] 1400524 1 T4 3 T5 2 T11 5
valid_sources[0x21] 1407439 1 T4 2 T5 1 T11 1
valid_sources[0x22] 3344724 1 T4 8 T11 3 T12 395
valid_sources[0x23] 1399699 1 T4 5 T5 2 T11 3
valid_sources[0x24] 1518696 1 T4 9 T11 3 T12 388
valid_sources[0x25] 1402358 1 T4 8 T5 1 T11 1
valid_sources[0x26] 1403377 1 T4 9 T5 2 T11 8
valid_sources[0x27] 2403400 1 T4 8 T11 10 T12 430
valid_sources[0x28] 1401832 1 T4 7 T11 6 T12 414
valid_sources[0x29] 1403636 1 T4 8 T11 3 T12 374
valid_sources[0x2a] 1403158 1 T4 9 T5 2 T11 4
valid_sources[0x2b] 1492772 1 T4 9 T11 3 T12 407
valid_sources[0x2c] 1399950 1 T4 4 T11 4 T12 393
valid_sources[0x2d] 1403612 1 T4 9 T5 1 T12 390
valid_sources[0x2e] 1393955 1 T4 4 T11 3 T12 373
valid_sources[0x2f] 1405212 1 T4 5 T12 389 T13 512
valid_sources[0x30] 1396959 1 T4 9 T11 1 T12 380
valid_sources[0x31] 1583693 1 T4 12 T11 9 T12 440
valid_sources[0x32] 1401860 1 T4 8 T11 10 T12 372
valid_sources[0x33] 3380560 1 T4 5 T5 2 T11 10
valid_sources[0x34] 1390233 1 T4 6 T11 6 T12 391
valid_sources[0x35] 1596389 1 T4 7 T5 3 T12 379
valid_sources[0x36] 2298124 1 T4 7 T11 7 T12 318
valid_sources[0x37] 1391051 1 T4 3 T5 1 T11 2
valid_sources[0x38] 1389749 1 T4 7 T12 377 T13 391
valid_sources[0x39] 1399239 1 T1 1145 T4 4 T11 4
valid_sources[0x3a] 1389575 1 T4 6 T5 1 T11 5
valid_sources[0x3b] 1399995 1 T4 13 T5 2 T11 8
valid_sources[0x3c] 1394517 1 T4 10 T12 372 T13 490
valid_sources[0x3d] 1395373 1 T4 6 T11 1 T12 341
valid_sources[0x3e] 1408253 1 T4 7 T11 1 T12 386
valid_sources[0x3f] 1394461 1 T4 3 T5 3 T11 2
valid_sources[0x40] 2167047 1 T4 7 T5 2 T11 3
valid_sources[0x41] 2134007 1 T4 5 T11 7 T12 375
valid_sources[0x42] 1398922 1 T4 6 T5 3 T11 1
valid_sources[0x43] 1395537 1 T4 13 T5 1 T11 6
valid_sources[0x44] 3372743 1 T4 8 T5 1 T12 428
valid_sources[0x45] 2290657 1 T4 7 T5 2 T11 2
valid_sources[0x46] 2060520 1 T3 657738 T4 8 T5 1
valid_sources[0x47] 1491754 1 T4 10 T12 395 T13 434
valid_sources[0x48] 1426076 1 T4 4 T5 1 T12 354
valid_sources[0x49] 1852863 1 T4 6 T12 387 T13 468
valid_sources[0x4a] 1399166 1 T4 5 T11 4 T12 382
valid_sources[0x4b] 1392083 1 T4 7 T11 8 T12 397
valid_sources[0x4c] 1405227 1 T4 6 T12 421 T13 439
valid_sources[0x4d] 1393422 1 T4 2 T11 4 T12 406
valid_sources[0x4e] 2259208 1 T4 4 T5 1 T12 394
valid_sources[0x4f] 1392370 1 T4 5 T5 2 T11 5
valid_sources[0x50] 2099478 1 T4 7 T5 3 T11 1
valid_sources[0x51] 1858722 1 T4 9 T5 1 T11 4
valid_sources[0x52] 1666973 1 T4 5 T5 1 T11 8
valid_sources[0x53] 1571246 1 T4 12 T11 2 T12 344
valid_sources[0x54] 1396723 1 T4 4 T12 345 T13 397
valid_sources[0x55] 1396255 1 T4 10 T5 2 T12 322
valid_sources[0x56] 1857172 1 T4 7 T11 10 T12 352
valid_sources[0x57] 1402987 1 T4 15 T5 1 T12 396
valid_sources[0x58] 1422450 1 T4 5 T11 3 T12 385
valid_sources[0x59] 1490733 1 T4 2 T11 7 T12 349
valid_sources[0x5a] 1727780 1 T4 8 T11 7 T12 352
valid_sources[0x5b] 1401492 1 T4 10 T5 1 T12 348
valid_sources[0x5c] 1398613 1 T4 12 T5 1 T11 7
valid_sources[0x5d] 1399608 1 T4 7 T5 1 T11 2
valid_sources[0x5e] 2056144 1 T4 11 T11 11 T12 406
valid_sources[0x5f] 1391428 1 T4 4 T5 1 T11 13
valid_sources[0x60] 1404311 1 T4 5 T11 2 T12 369
valid_sources[0x61] 1989471 1 T4 8 T5 1 T11 10
valid_sources[0x62] 5091901 1 T4 11 T11 2 T12 426
valid_sources[0x63] 1410109 1 T4 7 T5 2 T11 8
valid_sources[0x64] 1841062 1 T4 7 T11 4 T12 377
valid_sources[0x65] 1514084 1 T4 5 T5 1 T11 2
valid_sources[0x66] 1434059 1 T4 5 T12 372 T13 348
valid_sources[0x67] 1394479 1 T4 8 T5 1 T12 377
valid_sources[0x68] 1416509 1 T4 9 T11 2 T12 383
valid_sources[0x69] 1397170 1 T4 2 T11 2 T12 387
valid_sources[0x6a] 1471241 1 T4 12 T11 2 T12 337
valid_sources[0x6b] 1411069 1 T4 11 T11 2 T12 369
valid_sources[0x6c] 1402483 1 T4 5 T5 1 T11 4
valid_sources[0x6d] 2266708 1 T4 4 T5 1 T11 4
valid_sources[0x6e] 1405435 1 T4 5 T5 1 T12 375
valid_sources[0x6f] 2066990 1 T4 2 T5 1 T11 2
valid_sources[0x70] 3395682 1 T4 6 T5 1 T11 4
valid_sources[0x71] 1387125 1 T4 8 T5 1 T11 2
valid_sources[0x72] 1484417 1 T4 7 T11 4 T12 418
valid_sources[0x73] 1396178 1 T4 7 T5 1 T11 4
valid_sources[0x74] 3763759 1 T4 7 T5 1 T12 380
valid_sources[0x75] 1429061 1 T4 7 T5 1 T11 1
valid_sources[0x76] 1395610 1 T4 6 T11 2 T12 350
valid_sources[0x77] 1397280 1 T4 12 T5 1 T11 9
valid_sources[0x78] 1857197 1 T4 7 T12 375 T13 479
valid_sources[0x79] 1391390 1 T4 5 T11 8 T12 364
valid_sources[0x7a] 2531672 1 T4 7 T5 1 T12 406
valid_sources[0x7b] 1506612 1 T4 11 T11 4 T12 367
valid_sources[0x7c] 1394571 1 T4 12 T5 1 T11 8
valid_sources[0x7d] 1421589 1 T4 9 T5 1 T11 1
valid_sources[0x7e] 2511095 1 T4 12 T11 2 T12 389
valid_sources[0x7f] 1391790 1 T4 6 T11 6 T12 382
valid_sources[0x80] 1452900 1 T4 4 T5 1 T11 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 72445275 1 T1 31 T2 23 T3 88096
values[0x0] all_enables biggest_size 62117026 1 T1 510 T2 352 T3 88551
values[0x1] all_enables biggest_size 53619263 1 T1 521 T2 393 T3 74986

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%