Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 263201943 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 188549656 1 T1 809199 T2 17360 T3 1056



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 234085231 1 T1 100044 T2 12265 T3 675
values[0x0] 104570995 1 T1 449289 T2 4113 T3 457
values[0x1] 113095373 1 T1 480744 T2 4366 T3 483



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 204462550 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 247289049 1 T1 105420 T2 18297 T3 1162



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 2069142 1 T1 7516 T2 113 T3 6
valid_sources[0x01] 1411412 1 T1 7637 T2 83 T3 8
valid_sources[0x02] 1422551 1 T1 7613 T2 86 T3 3
valid_sources[0x03] 1412235 1 T1 7570 T2 61 T3 3
valid_sources[0x04] 1424696 1 T1 7595 T2 81 T3 6
valid_sources[0x05] 1486066 1 T1 7270 T2 90 T3 6
valid_sources[0x06] 2260918 1 T1 7457 T2 92 T3 9
valid_sources[0x07] 1571056 1 T1 7565 T2 98 T3 14
valid_sources[0x08] 1620024 1 T1 7444 T2 87 T3 4
valid_sources[0x09] 1418120 1 T1 7560 T2 102 T3 6
valid_sources[0x0a] 1426804 1 T1 7684 T2 78 T3 2
valid_sources[0x0b] 3771634 1 T1 7376 T2 87 T3 4
valid_sources[0x0c] 1416985 1 T1 7486 T2 67 T3 2
valid_sources[0x0d] 1537349 1 T1 7811 T2 81 T3 4
valid_sources[0x0e] 1421758 1 T1 7413 T2 85 T3 5
valid_sources[0x0f] 1410453 1 T1 7545 T2 77 T3 6
valid_sources[0x10] 2304120 1 T1 7607 T2 94 T3 7
valid_sources[0x11] 3523822 1 T1 7786 T2 81 T3 10
valid_sources[0x12] 1414411 1 T1 7355 T2 72 T3 9
valid_sources[0x13] 3780180 1 T1 7802 T2 81 T3 4
valid_sources[0x14] 2371123 1 T1 7803 T2 75 T3 8
valid_sources[0x15] 1978028 1 T1 7606 T2 93 T3 3
valid_sources[0x16] 1420843 1 T1 7551 T2 77 T3 7
valid_sources[0x17] 1420967 1 T1 7669 T2 87 T3 8
valid_sources[0x18] 1411193 1 T1 7443 T2 77 T3 15
valid_sources[0x19] 1741118 1 T1 7398 T2 92 T3 11
valid_sources[0x1a] 1418990 1 T1 7642 T2 95 T3 7
valid_sources[0x1b] 1415750 1 T1 7494 T2 82 T3 6
valid_sources[0x1c] 1423358 1 T1 7740 T2 90 T3 5
valid_sources[0x1d] 2077021 1 T1 7694 T2 72 T3 13
valid_sources[0x1e] 1409875 1 T1 7430 T2 70 T3 6
valid_sources[0x1f] 1586944 1 T1 7534 T2 83 T3 3
valid_sources[0x20] 1417710 1 T1 7429 T2 75 T3 4
valid_sources[0x21] 1872361 1 T1 7600 T2 84 T3 4
valid_sources[0x22] 2253846 1 T1 7525 T2 81 T3 2
valid_sources[0x23] 1417951 1 T1 7657 T2 93 T3 6
valid_sources[0x24] 1421307 1 T1 7437 T2 59 T3 3
valid_sources[0x25] 1967682 1 T1 7604 T2 62 T3 6
valid_sources[0x26] 1512258 1 T1 7669 T2 98 T3 3
valid_sources[0x27] 1474414 1 T1 7445 T2 81 T3 7
valid_sources[0x28] 1417451 1 T1 7606 T2 92 T3 16
valid_sources[0x29] 1424897 1 T1 7553 T2 93 T3 6
valid_sources[0x2a] 1524139 1 T1 7543 T2 68 T11 650
valid_sources[0x2b] 1419180 1 T1 7309 T2 67 T3 2
valid_sources[0x2c] 1416736 1 T1 7544 T2 56 T3 12
valid_sources[0x2d] 1415040 1 T1 7583 T2 71 T3 3
valid_sources[0x2e] 1424685 1 T1 7561 T2 104 T3 5
valid_sources[0x2f] 3387013 1 T1 7365 T2 88 T3 4
valid_sources[0x30] 1413900 1 T1 7623 T2 60 T3 9
valid_sources[0x31] 1880476 1 T1 7581 T2 77 T3 2
valid_sources[0x32] 1421034 1 T1 7478 T2 113 T3 9
valid_sources[0x33] 1425379 1 T1 7463 T2 89 T3 3
valid_sources[0x34] 1431066 1 T1 7501 T2 72 T3 7
valid_sources[0x35] 2375304 1 T1 7305 T2 77 T3 4
valid_sources[0x36] 1469117 1 T1 7272 T2 75 T3 9
valid_sources[0x37] 1416962 1 T1 7702 T2 72 T3 9
valid_sources[0x38] 3759565 1 T1 7492 T2 74 T3 11
valid_sources[0x39] 1456711 1 T1 7699 T2 77 T3 5
valid_sources[0x3a] 1459504 1 T1 7487 T2 88 T3 7
valid_sources[0x3b] 1425703 1 T1 7650 T2 103 T3 9
valid_sources[0x3c] 1514095 1 T1 7445 T2 76 T3 11
valid_sources[0x3d] 1413465 1 T1 7592 T2 95 T3 14
valid_sources[0x3e] 2286561 1 T1 7641 T2 80 T3 2
valid_sources[0x3f] 3412671 1 T1 7584 T2 72 T3 3
valid_sources[0x40] 1500516 1 T1 7407 T2 78 T3 5
valid_sources[0x41] 1422154 1 T1 7588 T2 75 T3 4
valid_sources[0x42] 1413780 1 T1 7651 T2 78 T3 3
valid_sources[0x43] 1430315 1 T1 7369 T2 95 T3 2
valid_sources[0x44] 1859733 1 T1 7392 T2 82 T3 10
valid_sources[0x45] 1420925 1 T1 7574 T2 84 T3 21
valid_sources[0x46] 1427854 1 T1 7442 T2 71 T3 5
valid_sources[0x47] 3406869 1 T1 7534 T2 77 T3 8
valid_sources[0x48] 2630480 1 T1 7375 T2 72 T3 3
valid_sources[0x49] 2604236 1 T1 7644 T2 85 T3 5
valid_sources[0x4a] 1443249 1 T1 7549 T2 84 T3 9
valid_sources[0x4b] 1911226 1 T1 7501 T2 89 T3 4
valid_sources[0x4c] 2242542 1 T1 7436 T2 57 T3 13
valid_sources[0x4d] 1422080 1 T1 7570 T2 73 T3 2
valid_sources[0x4e] 1925061 1 T1 7632 T2 90 T3 4
valid_sources[0x4f] 3385433 1 T1 7701 T2 74 T11 609
valid_sources[0x50] 1416877 1 T1 7389 T2 75 T3 17
valid_sources[0x51] 1412511 1 T1 7503 T2 59 T3 7
valid_sources[0x52] 2309786 1 T1 7659 T2 58 T3 4
valid_sources[0x53] 1403619 1 T1 7583 T2 64 T3 5
valid_sources[0x54] 2073469 1 T1 7493 T2 82 T3 4
valid_sources[0x55] 3425574 1 T1 7816 T2 71 T3 7
valid_sources[0x56] 2336688 1 T1 7532 T2 82 T3 8
valid_sources[0x57] 1421296 1 T1 7521 T2 96 T3 3
valid_sources[0x58] 1793024 1 T1 7361 T2 62 T3 5
valid_sources[0x59] 1410965 1 T1 7421 T2 108 T3 1
valid_sources[0x5a] 1426097 1 T1 7417 T2 82 T3 1
valid_sources[0x5b] 1853633 1 T1 7727 T2 90 T3 15
valid_sources[0x5c] 3392243 1 T1 7419 T2 70 T3 2
valid_sources[0x5d] 1416241 1 T1 7551 T2 68 T3 3
valid_sources[0x5e] 1436941 1 T1 7593 T2 64 T3 1
valid_sources[0x5f] 1599731 1 T1 7556 T2 75 T3 14
valid_sources[0x60] 3384289 1 T1 7670 T2 94 T3 2
valid_sources[0x61] 1442944 1 T1 7373 T2 81 T3 8
valid_sources[0x62] 3389117 1 T1 7597 T2 92 T3 1
valid_sources[0x63] 1413851 1 T1 7668 T2 98 T3 5
valid_sources[0x64] 1412844 1 T1 7235 T2 78 T3 10
valid_sources[0x65] 1423885 1 T1 7628 T2 74 T3 3
valid_sources[0x66] 1420146 1 T1 7486 T2 86 T3 4
valid_sources[0x67] 1421722 1 T1 7474 T2 80 T3 9
valid_sources[0x68] 3770450 1 T1 7660 T2 86 T3 6
valid_sources[0x69] 1416461 1 T1 7642 T2 84 T3 14
valid_sources[0x6a] 1421927 1 T1 7567 T2 104 T3 4
valid_sources[0x6b] 1549623 1 T1 7642 T2 78 T3 6
valid_sources[0x6c] 2310743 1 T1 7565 T2 80 T3 5
valid_sources[0x6d] 2087394 1 T1 7789 T2 70 T3 4
valid_sources[0x6e] 1424832 1 T1 7524 T2 83 T3 9
valid_sources[0x6f] 1525022 1 T1 7473 T2 78 T3 9
valid_sources[0x70] 3390112 1 T1 7516 T2 68 T3 6
valid_sources[0x71] 1417797 1 T1 7611 T2 81 T3 4
valid_sources[0x72] 1420034 1 T1 7587 T2 74 T3 5
valid_sources[0x73] 1415125 1 T1 7314 T2 80 T3 2
valid_sources[0x74] 1457208 1 T1 7618 T2 96 T3 8
valid_sources[0x75] 1421447 1 T1 7433 T2 69 T3 2
valid_sources[0x76] 1406175 1 T1 7730 T2 68 T3 3
valid_sources[0x77] 2089423 1 T1 7821 T2 63 T3 5
valid_sources[0x78] 1418194 1 T1 7635 T2 90 T3 5
valid_sources[0x79] 2071150 1 T1 7370 T2 89 T3 5
valid_sources[0x7a] 1415729 1 T1 7531 T2 83 T3 15
valid_sources[0x7b] 1421939 1 T1 7521 T2 72 T3 3
valid_sources[0x7c] 1416687 1 T1 7559 T2 108 T3 7
valid_sources[0x7d] 1415980 1 T1 7719 T2 78 T3 9
valid_sources[0x7e] 1421187 1 T1 7499 T2 73 T3 3
valid_sources[0x7f] 1520030 1 T1 7599 T2 95 T11 592
valid_sources[0x80] 1420448 1 T1 7573 T2 66 T3 6



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 72958776 1 T1 319380 T2 10340 T3 318
values[0x0] all_enables biggest_size 62059504 1 T1 264038 T2 3473 T3 371
values[0x1] all_enables biggest_size 53531376 1 T1 225781 T2 3547 T3 367

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%