Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
178255 |
1 |
|
|
T7 |
1484 |
|
T8 |
319 |
|
T9 |
713 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
97549 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
57559 |
1 |
|
|
T7 |
970 |
|
T8 |
315 |
|
T9 |
28 |
seven_bytes |
3382 |
1 |
|
|
T7 |
14 |
|
T9 |
22 |
|
T16 |
61 |
six_bytes |
3190 |
1 |
|
|
T7 |
20 |
|
T9 |
18 |
|
T16 |
52 |
five_bytes |
3266 |
1 |
|
|
T7 |
17 |
|
T9 |
16 |
|
T16 |
51 |
four_bytes |
3342 |
1 |
|
|
T7 |
13 |
|
T9 |
13 |
|
T16 |
61 |
three_bytes |
3293 |
1 |
|
|
T7 |
16 |
|
T9 |
23 |
|
T16 |
60 |
two_bytes |
3319 |
1 |
|
|
T7 |
20 |
|
T9 |
17 |
|
T16 |
71 |
one_byte |
3355 |
1 |
|
|
T7 |
13 |
|
T9 |
24 |
|
T16 |
66 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174979 |
1 |
|
|
T7 |
1452 |
|
T8 |
311 |
|
T9 |
707 |
auto[1] |
3276 |
1 |
|
|
T7 |
32 |
|
T8 |
8 |
|
T9 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
178255 |
1 |
|
|
T7 |
1484 |
|
T8 |
319 |
|
T9 |
713 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
178243 |
1 |
|
|
T7 |
1484 |
|
T8 |
319 |
|
T9 |
713 |
auto[1] |
12 |
1 |
|
|
T16 |
1 |
|
T23 |
1 |
|
T170 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1087 |
1 |
|
|
T7 |
14 |
|
T8 |
4 |
|
T9 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3276 |
1 |
|
|
T7 |
32 |
|
T8 |
8 |
|
T9 |
6 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
190026 |
1 |
|
|
T7 |
985 |
|
T8 |
540 |
|
T9 |
755 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
102360 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
63080 |
1 |
|
|
T7 |
973 |
|
T8 |
532 |
|
T9 |
19 |
seven_bytes |
3485 |
1 |
|
|
T9 |
22 |
|
T16 |
86 |
|
T38 |
1 |
six_bytes |
3528 |
1 |
|
|
T9 |
23 |
|
T16 |
86 |
|
T38 |
4 |
five_bytes |
3606 |
1 |
|
|
T9 |
14 |
|
T16 |
96 |
|
T38 |
2 |
four_bytes |
3459 |
1 |
|
|
T9 |
14 |
|
T16 |
97 |
|
T38 |
3 |
three_bytes |
3456 |
1 |
|
|
T9 |
34 |
|
T16 |
76 |
|
T38 |
2 |
two_bytes |
3531 |
1 |
|
|
T9 |
26 |
|
T16 |
96 |
|
T38 |
8 |
one_byte |
3521 |
1 |
|
|
T9 |
22 |
|
T16 |
97 |
|
T38 |
2 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
186552 |
1 |
|
|
T7 |
961 |
|
T8 |
524 |
|
T9 |
745 |
auto[1] |
3474 |
1 |
|
|
T7 |
24 |
|
T8 |
16 |
|
T9 |
10 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
190026 |
1 |
|
|
T7 |
985 |
|
T8 |
540 |
|
T9 |
755 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
190015 |
1 |
|
|
T7 |
985 |
|
T8 |
540 |
|
T9 |
755 |
auto[1] |
11 |
1 |
|
|
T171 |
2 |
|
T172 |
1 |
|
T173 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1176 |
1 |
|
|
T7 |
12 |
|
T8 |
8 |
|
T9 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3474 |
1 |
|
|
T7 |
24 |
|
T8 |
16 |
|
T9 |
10 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
352066 |
1 |
|
|
T7 |
2531 |
|
T8 |
740 |
|
T9 |
1639 |
auto[1] |
466 |
1 |
|
|
T10 |
43 |
|
T11 |
6 |
|
T12 |
33 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
190052 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
117026 |
1 |
|
|
T7 |
1563 |
|
T8 |
727 |
|
T9 |
50 |
seven_bytes |
6532 |
1 |
|
|
T7 |
39 |
|
T9 |
45 |
|
T16 |
139 |
six_bytes |
6641 |
1 |
|
|
T7 |
33 |
|
T9 |
45 |
|
T16 |
167 |
five_bytes |
6425 |
1 |
|
|
T7 |
25 |
|
T9 |
35 |
|
T16 |
158 |
four_bytes |
6504 |
1 |
|
|
T7 |
20 |
|
T9 |
49 |
|
T16 |
161 |
three_bytes |
6519 |
1 |
|
|
T7 |
25 |
|
T9 |
52 |
|
T16 |
146 |
two_bytes |
6392 |
1 |
|
|
T7 |
37 |
|
T9 |
40 |
|
T16 |
151 |
one_byte |
6441 |
1 |
|
|
T7 |
26 |
|
T9 |
48 |
|
T16 |
152 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
345877 |
1 |
|
|
T7 |
2473 |
|
T8 |
714 |
|
T9 |
1619 |
auto[1] |
6655 |
1 |
|
|
T7 |
58 |
|
T8 |
26 |
|
T9 |
20 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
352532 |
1 |
|
|
T7 |
2531 |
|
T8 |
740 |
|
T9 |
1639 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
352500 |
1 |
|
|
T7 |
2531 |
|
T8 |
740 |
|
T9 |
1639 |
auto[1] |
32 |
1 |
|
|
T91 |
2 |
|
T174 |
1 |
|
T64 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2215 |
1 |
|
|
T7 |
22 |
|
T8 |
13 |
|
T9 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6655 |
1 |
|
|
T7 |
58 |
|
T8 |
26 |
|
T9 |
20 |