Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
163739 |
1 |
|
|
T7 |
70 |
|
T8 |
576 |
|
T9 |
338 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
82058 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
62448 |
1 |
|
|
T7 |
69 |
|
T8 |
13 |
|
T9 |
334 |
seven_bytes |
2717 |
1 |
|
|
T8 |
14 |
|
T20 |
11 |
|
T16 |
28 |
six_bytes |
2767 |
1 |
|
|
T8 |
24 |
|
T20 |
6 |
|
T16 |
36 |
five_bytes |
2734 |
1 |
|
|
T8 |
11 |
|
T20 |
13 |
|
T16 |
25 |
four_bytes |
2815 |
1 |
|
|
T8 |
21 |
|
T20 |
15 |
|
T16 |
28 |
three_bytes |
2710 |
1 |
|
|
T8 |
12 |
|
T20 |
7 |
|
T16 |
24 |
two_bytes |
2760 |
1 |
|
|
T8 |
19 |
|
T20 |
14 |
|
T16 |
24 |
one_byte |
2730 |
1 |
|
|
T8 |
13 |
|
T20 |
15 |
|
T16 |
32 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
160571 |
1 |
|
|
T7 |
68 |
|
T8 |
568 |
|
T9 |
330 |
auto[1] |
3168 |
1 |
|
|
T7 |
2 |
|
T8 |
8 |
|
T9 |
8 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
163739 |
1 |
|
|
T7 |
70 |
|
T8 |
576 |
|
T9 |
338 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
163731 |
1 |
|
|
T7 |
70 |
|
T8 |
576 |
|
T9 |
338 |
auto[1] |
8 |
1 |
|
|
T184 |
1 |
|
T185 |
1 |
|
T186 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1125 |
1 |
|
|
T7 |
1 |
|
T9 |
4 |
|
T16 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3168 |
1 |
|
|
T7 |
2 |
|
T8 |
8 |
|
T9 |
8 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168222 |
1 |
|
|
T8 |
579 |
|
T9 |
39 |
|
T20 |
253 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
89031 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
58144 |
1 |
|
|
T8 |
19 |
|
T9 |
38 |
|
T20 |
6 |
seven_bytes |
2943 |
1 |
|
|
T8 |
11 |
|
T20 |
3 |
|
T16 |
29 |
six_bytes |
2988 |
1 |
|
|
T8 |
17 |
|
T20 |
6 |
|
T16 |
34 |
five_bytes |
3024 |
1 |
|
|
T8 |
22 |
|
T20 |
3 |
|
T16 |
28 |
four_bytes |
3030 |
1 |
|
|
T8 |
13 |
|
T20 |
7 |
|
T16 |
37 |
three_bytes |
2997 |
1 |
|
|
T8 |
12 |
|
T20 |
5 |
|
T16 |
31 |
two_bytes |
2998 |
1 |
|
|
T8 |
11 |
|
T20 |
13 |
|
T16 |
37 |
one_byte |
3067 |
1 |
|
|
T8 |
18 |
|
T20 |
6 |
|
T16 |
25 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165040 |
1 |
|
|
T8 |
575 |
|
T9 |
37 |
|
T20 |
247 |
auto[1] |
3182 |
1 |
|
|
T8 |
4 |
|
T9 |
2 |
|
T20 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168222 |
1 |
|
|
T8 |
579 |
|
T9 |
39 |
|
T20 |
253 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168214 |
1 |
|
|
T8 |
579 |
|
T9 |
39 |
|
T20 |
253 |
auto[1] |
8 |
1 |
|
|
T108 |
1 |
|
T74 |
1 |
|
T184 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1093 |
1 |
|
|
T8 |
1 |
|
T9 |
1 |
|
T20 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3182 |
1 |
|
|
T8 |
4 |
|
T9 |
2 |
|
T20 |
6 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
324176 |
1 |
|
|
T7 |
131 |
|
T8 |
2074 |
|
T9 |
229 |
auto[1] |
456 |
1 |
|
|
T10 |
11 |
|
T11 |
79 |
|
T12 |
15 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
172608 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
110694 |
1 |
|
|
T7 |
129 |
|
T8 |
64 |
|
T9 |
225 |
seven_bytes |
6006 |
1 |
|
|
T8 |
52 |
|
T20 |
7 |
|
T16 |
74 |
six_bytes |
5894 |
1 |
|
|
T8 |
63 |
|
T20 |
7 |
|
T16 |
80 |
five_bytes |
5893 |
1 |
|
|
T8 |
52 |
|
T20 |
10 |
|
T16 |
72 |
four_bytes |
5904 |
1 |
|
|
T8 |
48 |
|
T20 |
12 |
|
T16 |
85 |
three_bytes |
5796 |
1 |
|
|
T8 |
55 |
|
T20 |
10 |
|
T16 |
86 |
two_bytes |
5934 |
1 |
|
|
T8 |
57 |
|
T20 |
8 |
|
T16 |
55 |
one_byte |
5903 |
1 |
|
|
T8 |
59 |
|
T20 |
10 |
|
T16 |
75 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
318495 |
1 |
|
|
T7 |
127 |
|
T8 |
2050 |
|
T9 |
221 |
auto[1] |
6137 |
1 |
|
|
T7 |
4 |
|
T8 |
24 |
|
T9 |
8 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
324632 |
1 |
|
|
T7 |
131 |
|
T8 |
2074 |
|
T9 |
229 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
324615 |
1 |
|
|
T7 |
131 |
|
T8 |
2074 |
|
T9 |
229 |
auto[1] |
17 |
1 |
|
|
T187 |
1 |
|
T188 |
2 |
|
T189 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2064 |
1 |
|
|
T7 |
2 |
|
T8 |
4 |
|
T9 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6137 |
1 |
|
|
T7 |
4 |
|
T8 |
24 |
|
T9 |
8 |