Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	257878508	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

182922499

1

T1

2

T2

251544

T3

80151

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	228575104	1			T1	1		T2	278188		T3	90402
values[0x0]	101977139	1			T1	4		T2	119148		T3	22524
values[0x1]	110248764	1			T1	7		T2	136355		T3	23857

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	200408736	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

240392271

1

T1

4

T2

322053

T3

93191

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1295455	1			T2	1960		T3	435		T7	90
valid_sources[0x01]	2217019	1			T2	2334		T3	439		T7	126
valid_sources[0x02]	1280567	1			T2	2172		T3	539		T7	217
valid_sources[0x03]	1293594	1			T2	2175		T3	519		T7	132
valid_sources[0x04]	1298051	1			T2	2096		T3	524		T7	263
valid_sources[0x05]	1425030	1			T2	2010		T3	281		T7	154
valid_sources[0x06]	1291071	1			T2	2065		T3	486		T7	258
valid_sources[0x07]	1670275	1			T2	1982		T3	533		T7	206
valid_sources[0x08]	1294328	1			T2	1990		T3	442		T7	208
valid_sources[0x09]	2187587	1			T2	2104		T3	586		T7	193
valid_sources[0x0a]	1289333	1			T2	2088		T3	632		T7	131
valid_sources[0x0b]	1293967	1			T2	2063		T3	462		T7	137
valid_sources[0x0c]	1307719	1			T2	1989		T3	414		T7	153
valid_sources[0x0d]	2206172	1			T2	2232		T3	510		T7	207
valid_sources[0x0e]	1756155	1			T2	1967		T3	464		T7	147
valid_sources[0x0f]	1741520	1			T2	2064		T3	470		T7	144
valid_sources[0x10]	1293877	1			T2	2085		T3	652		T7	237
valid_sources[0x11]	1285836	1			T2	2288		T3	545		T7	140
valid_sources[0x12]	1296376	1			T2	2253		T3	584		T7	116
valid_sources[0x13]	1427960	1			T2	2124		T3	452		T7	92
valid_sources[0x14]	1359215	1			T2	2094		T3	496		T7	104
valid_sources[0x15]	1457387	1			T2	2269		T3	671		T7	202
valid_sources[0x16]	1286686	1			T2	2069		T3	657		T7	92
valid_sources[0x17]	4593273	1			T2	2053		T3	491		T7	195
valid_sources[0x18]	1281040	1			T2	2098		T3	446		T7	222
valid_sources[0x19]	1302604	1			T2	2119		T3	619		T7	210
valid_sources[0x1a]	1293092	1			T2	2022		T3	688		T7	207
valid_sources[0x1b]	1942245	1			T2	2181		T3	423		T7	175
valid_sources[0x1c]	1293043	1			T2	2122		T3	560		T7	180
valid_sources[0x1d]	1404631	1			T2	2041		T3	279		T7	189
valid_sources[0x1e]	1747385	1			T2	2067		T3	556		T7	253
valid_sources[0x1f]	4160735	1			T2	1998		T3	541		T7	175
valid_sources[0x20]	1288311	1			T2	2129		T3	668		T7	206
valid_sources[0x21]	1292455	1			T2	2064		T3	443		T7	175
valid_sources[0x22]	3278038	1			T2	2026		T3	568		T7	157
valid_sources[0x23]	1412984	1			T2	2194		T3	565		T7	226
valid_sources[0x24]	1336146	1			T2	2076		T3	720		T7	165
valid_sources[0x25]	1290473	1			T2	2107		T3	445		T7	150
valid_sources[0x26]	1294181	1			T1	1		T2	2098		T3	577
valid_sources[0x27]	1287655	1			T2	2031		T3	516		T7	195
valid_sources[0x28]	1292012	1			T2	2114		T3	382		T7	208
valid_sources[0x29]	1405509	1			T1	2		T2	2103		T3	615
valid_sources[0x2a]	1944383	1			T2	2256		T3	419		T7	243
valid_sources[0x2b]	2993406	1			T2	1981		T3	466		T7	210
valid_sources[0x2c]	1428696	1			T2	1988		T3	784		T7	189
valid_sources[0x2d]	1290590	1			T2	2230		T3	548		T7	131
valid_sources[0x2e]	1286079	1			T2	2159		T3	566		T7	180
valid_sources[0x2f]	1291890	1			T2	2126		T3	589		T7	180
valid_sources[0x30]	1286087	1			T2	2241		T3	379		T7	195
valid_sources[0x31]	2145165	1			T2	2097		T3	602		T7	226
valid_sources[0x32]	1287541	1			T2	2075		T3	587		T7	147
valid_sources[0x33]	1283637	1			T2	2030		T3	524		T7	185
valid_sources[0x34]	1288548	1			T2	1992		T3	483		T7	223
valid_sources[0x35]	1293691	1			T1	1		T2	2267		T3	631
valid_sources[0x36]	1289803	1			T2	2033		T3	516		T7	142
valid_sources[0x37]	1293283	1			T2	2084		T3	511		T7	222
valid_sources[0x38]	1287643	1			T2	2105		T3	448		T7	214
valid_sources[0x39]	1292793	1			T2	2070		T3	665		T7	147
valid_sources[0x3a]	1738220	1			T2	2194		T3	442		T7	167
valid_sources[0x3b]	1294903	1			T2	2233		T3	434		T7	209
valid_sources[0x3c]	1293737	1			T2	2151		T3	443		T7	240
valid_sources[0x3d]	1638661	1			T2	1984		T3	550		T7	163
valid_sources[0x3e]	1295880	1			T2	1995		T3	611		T7	189
valid_sources[0x3f]	1367681	1			T2	1997		T3	509		T7	220
valid_sources[0x40]	3615518	1			T2	1969		T3	510		T7	138
valid_sources[0x41]	1284753	1			T2	2150		T3	587		T7	160
valid_sources[0x42]	1294638	1			T2	2029		T3	467		T7	164
valid_sources[0x43]	1284448	1			T2	1993		T3	516		T7	221
valid_sources[0x44]	1292467	1			T2	2241		T3	580		T7	182
valid_sources[0x45]	3611069	1			T2	2148		T3	681		T7	182
valid_sources[0x46]	1359694	1			T2	2026		T3	499		T7	119
valid_sources[0x47]	1285830	1			T2	2100		T3	478		T7	161
valid_sources[0x48]	3247493	1			T2	2158		T3	400		T7	369
valid_sources[0x49]	1292382	1			T1	1		T2	2013		T3	610
valid_sources[0x4a]	3099966	1			T2	2032		T3	522		T7	98
valid_sources[0x4b]	1294661	1			T2	2004		T3	454		T7	82
valid_sources[0x4c]	3225293	1			T2	2080		T3	559		T7	179
valid_sources[0x4d]	1302137	1			T2	2119		T3	506		T7	124
valid_sources[0x4e]	1289482	1			T2	1936		T3	646		T7	244
valid_sources[0x4f]	1295060	1			T2	1978		T3	500		T7	237
valid_sources[0x50]	2176123	1			T2	2063		T3	487		T7	158
valid_sources[0x51]	3588536	1			T2	2120		T3	633		T7	259
valid_sources[0x52]	1292315	1			T2	1890		T3	596		T7	223
valid_sources[0x53]	3282756	1			T2	2215		T3	433		T7	144
valid_sources[0x54]	3687381	1			T2	1870		T3	474		T7	99
valid_sources[0x55]	1293031	1			T2	2103		T3	560		T7	172
valid_sources[0x56]	1292751	1			T2	2086		T3	450		T7	110
valid_sources[0x57]	1942401	1			T2	2102		T3	551		T7	299
valid_sources[0x58]	2937712	1			T2	2046		T3	473		T7	209
valid_sources[0x59]	3615401	1			T2	2189		T3	757		T7	229
valid_sources[0x5a]	1312432	1			T2	2094		T3	368		T7	336
valid_sources[0x5b]	1286240	1			T2	1994		T3	445		T7	168
valid_sources[0x5c]	1290137	1			T2	2129		T3	498		T7	110
valid_sources[0x5d]	1286122	1			T2	2158		T3	283		T7	179
valid_sources[0x5e]	1292506	1			T2	1966		T3	488		T7	163
valid_sources[0x5f]	1284137	1			T2	2104		T3	583		T7	187
valid_sources[0x60]	1535568	1			T2	2071		T3	613		T7	183
valid_sources[0x61]	2201628	1			T2	2187		T3	474		T7	251
valid_sources[0x62]	1284228	1			T2	1986		T3	463		T7	222
valid_sources[0x63]	1285720	1			T1	1		T2	2023		T3	663
valid_sources[0x64]	1296349	1			T2	1984		T3	616		T7	242
valid_sources[0x65]	1950890	1			T2	2082		T3	649		T7	174
valid_sources[0x66]	1291568	1			T2	2143		T3	350		T7	153
valid_sources[0x67]	3618800	1			T2	2294		T3	556		T7	181
valid_sources[0x68]	2153569	1			T2	1979		T3	477		T7	257
valid_sources[0x69]	1295153	1			T2	2069		T3	563		T7	126
valid_sources[0x6a]	1295579	1			T2	2179		T3	473		T7	258
valid_sources[0x6b]	3665172	1			T2	2052		T3	405		T7	111
valid_sources[0x6c]	1740909	1			T2	2013		T3	619		T7	227
valid_sources[0x6d]	1357073	1			T2	2118		T3	397		T7	123
valid_sources[0x6e]	1294898	1			T2	2218		T3	606		T7	255
valid_sources[0x6f]	1295775	1			T2	2229		T3	584		T7	122
valid_sources[0x70]	2187586	1			T2	2079		T3	434		T7	257
valid_sources[0x71]	3617385	1			T2	1962		T3	673		T7	193
valid_sources[0x72]	1299134	1			T2	2009		T3	493		T7	154
valid_sources[0x73]	1345699	1			T2	2042		T3	763		T7	156
valid_sources[0x74]	1316687	1			T2	2017		T3	538		T7	257
valid_sources[0x75]	1290606	1			T2	2119		T3	465		T7	114
valid_sources[0x76]	1285403	1			T1	1		T2	2182		T3	612
valid_sources[0x77]	1290618	1			T2	2027		T3	708		T7	169
valid_sources[0x78]	3594524	1			T2	2063		T3	586		T7	153
valid_sources[0x79]	1284142	1			T2	2217		T3	542		T7	302
valid_sources[0x7a]	1341923	1			T2	1972		T3	333		T7	129
valid_sources[0x7b]	1288384	1			T2	2100		T3	572		T7	153
valid_sources[0x7c]	1295212	1			T2	2035		T3	573		T7	156
valid_sources[0x7d]	1299778	1			T2	1941		T3	673		T7	194
valid_sources[0x7e]	1386078	1			T2	2194		T3	452		T7	166
valid_sources[0x7f]	1290767	1			T2	2267		T3	459		T7	151
valid_sources[0x80]	1291940	1			T2	2108		T3	545		T7	153

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

70908360

1

T2

102016

T3

54023

T7

16757

values[0x0]

all_enables

biggest_size

60202237

1

T1

2

T2

78796

T3

13911

values[0x1]

all_enables

biggest_size

51811902

1

T2

70732

T3

12217

T7

4226