Unified Coverage Report :: Group :: kmac_env_pkg::app_cg_wrap::app_cfg_reg_cg

Group : kmac_env_pkg::app_cg_wrap::app_cfg_reg_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

3 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
AppKeymgr_cg_(1)	100.00	1	100	1	64	64
AppLc_cg_(1)	100.00	1	100	1	64	64
AppRom_cg_(1)	100.00	1	100	1	64	64

---

Group Instance : AppKeymgr_cg_(1)

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance AppKeymgr_cg_(1)

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	3	0	3	100.00

Variables for Group Instance AppKeymgr_cg_(1)

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
sw_configured_hash_mode	3	0	3	100.00	100	1	1	0

---

Group Instance : AppLc_cg_(1)

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance AppLc_cg_(1)

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	3	0	3	100.00

Variables for Group Instance AppLc_cg_(1)

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
sw_configured_hash_mode	3	0	3	100.00	100	1	1	0

---

Group Instance : AppRom_cg_(1)

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance AppRom_cg_(1)

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	3	0	3	100.00

Variables for Group Instance AppRom_cg_(1)

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
sw_configured_hash_mode	3	0	3	100.00	100	1	1	0

Summary for Variable sw_configured_hash_mode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for sw_configured_hash_mode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
cshake	998	1			T2	10		T7	9		T20	1
shake	1005	1			T2	5		T3	2		T7	13
sha3	1082	1			T2	8		T3	1		T7	10

Summary for Variable sw_configured_hash_mode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for sw_configured_hash_mode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
cshake	513	1			T2	6		T7	4		T20	1
shake	526	1			T2	2		T7	4		T21	1
sha3	556	1			T2	5		T3	1		T7	4

Summary for Variable sw_configured_hash_mode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for sw_configured_hash_mode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
cshake	538	1			T2	2		T3	4		T7	8
shake	527	1			T2	2		T3	2		T7	1
sha3	548	1			T2	3		T7	5		T20	1