Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168757 |
1 |
|
|
T1 |
217 |
|
T2 |
1604 |
|
T3 |
156 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
85021 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
63530 |
1 |
|
|
T1 |
215 |
|
T2 |
42 |
|
T3 |
3 |
seven_bytes |
2907 |
1 |
|
|
T2 |
39 |
|
T3 |
7 |
|
T16 |
18 |
six_bytes |
2842 |
1 |
|
|
T2 |
55 |
|
T3 |
1 |
|
T16 |
21 |
five_bytes |
2958 |
1 |
|
|
T2 |
41 |
|
T3 |
4 |
|
T16 |
15 |
four_bytes |
2938 |
1 |
|
|
T2 |
40 |
|
T3 |
2 |
|
T16 |
13 |
three_bytes |
2880 |
1 |
|
|
T2 |
39 |
|
T3 |
6 |
|
T16 |
27 |
two_bytes |
2905 |
1 |
|
|
T2 |
43 |
|
T3 |
2 |
|
T16 |
15 |
one_byte |
2776 |
1 |
|
|
T2 |
33 |
|
T3 |
3 |
|
T16 |
18 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165420 |
1 |
|
|
T1 |
213 |
|
T2 |
1588 |
|
T3 |
150 |
auto[1] |
3337 |
1 |
|
|
T1 |
4 |
|
T2 |
16 |
|
T3 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168757 |
1 |
|
|
T1 |
217 |
|
T2 |
1604 |
|
T3 |
156 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168743 |
1 |
|
|
T1 |
217 |
|
T2 |
1604 |
|
T3 |
156 |
auto[1] |
14 |
1 |
|
|
T13 |
1 |
|
T161 |
1 |
|
T171 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1153 |
1 |
|
|
T1 |
2 |
|
T2 |
2 |
|
T16 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3337 |
1 |
|
|
T1 |
4 |
|
T2 |
16 |
|
T3 |
6 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182351 |
1 |
|
|
T2 |
375 |
|
T3 |
291 |
|
T16 |
599 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
94295 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
65560 |
1 |
|
|
T2 |
10 |
|
T3 |
8 |
|
T16 |
15 |
seven_bytes |
3163 |
1 |
|
|
T2 |
12 |
|
T3 |
3 |
|
T16 |
15 |
six_bytes |
3172 |
1 |
|
|
T2 |
12 |
|
T3 |
7 |
|
T16 |
24 |
five_bytes |
3249 |
1 |
|
|
T2 |
9 |
|
T3 |
5 |
|
T16 |
15 |
four_bytes |
3272 |
1 |
|
|
T2 |
11 |
|
T3 |
9 |
|
T16 |
20 |
three_bytes |
3197 |
1 |
|
|
T2 |
7 |
|
T3 |
12 |
|
T16 |
28 |
two_bytes |
3153 |
1 |
|
|
T2 |
9 |
|
T3 |
4 |
|
T16 |
18 |
one_byte |
3290 |
1 |
|
|
T2 |
12 |
|
T3 |
8 |
|
T16 |
11 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
178937 |
1 |
|
|
T2 |
371 |
|
T3 |
289 |
|
T16 |
591 |
auto[1] |
3414 |
1 |
|
|
T2 |
4 |
|
T3 |
2 |
|
T16 |
8 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182351 |
1 |
|
|
T2 |
375 |
|
T3 |
291 |
|
T16 |
599 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182340 |
1 |
|
|
T2 |
375 |
|
T3 |
291 |
|
T16 |
599 |
auto[1] |
11 |
1 |
|
|
T14 |
1 |
|
T101 |
1 |
|
T172 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1195 |
1 |
|
|
T2 |
1 |
|
T3 |
1 |
|
T16 |
3 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3414 |
1 |
|
|
T2 |
4 |
|
T3 |
2 |
|
T16 |
8 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
341959 |
1 |
|
|
T1 |
167 |
|
T2 |
3537 |
|
T3 |
349 |
auto[1] |
543 |
1 |
|
|
T7 |
30 |
|
T8 |
90 |
|
T9 |
73 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
170164 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
132029 |
1 |
|
|
T1 |
165 |
|
T2 |
93 |
|
T3 |
11 |
seven_bytes |
5794 |
1 |
|
|
T2 |
92 |
|
T3 |
7 |
|
T16 |
11 |
six_bytes |
5703 |
1 |
|
|
T2 |
93 |
|
T3 |
16 |
|
T16 |
5 |
five_bytes |
5837 |
1 |
|
|
T2 |
88 |
|
T3 |
9 |
|
T16 |
7 |
four_bytes |
5769 |
1 |
|
|
T2 |
108 |
|
T3 |
7 |
|
T16 |
4 |
three_bytes |
5802 |
1 |
|
|
T2 |
103 |
|
T3 |
6 |
|
T16 |
4 |
two_bytes |
5691 |
1 |
|
|
T2 |
94 |
|
T3 |
9 |
|
T16 |
7 |
one_byte |
5713 |
1 |
|
|
T2 |
89 |
|
T3 |
12 |
|
T16 |
7 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
335824 |
1 |
|
|
T1 |
163 |
|
T2 |
3497 |
|
T3 |
343 |
auto[1] |
6678 |
1 |
|
|
T1 |
4 |
|
T2 |
40 |
|
T3 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
342502 |
1 |
|
|
T1 |
167 |
|
T2 |
3537 |
|
T3 |
349 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
342485 |
1 |
|
|
T1 |
167 |
|
T2 |
3537 |
|
T3 |
349 |
auto[1] |
17 |
1 |
|
|
T98 |
1 |
|
T123 |
1 |
|
T21 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2333 |
1 |
|
|
T1 |
2 |
|
T2 |
10 |
|
T3 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6678 |
1 |
|
|
T1 |
4 |
|
T2 |
40 |
|
T3 |
6 |