Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	257125975	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

183457533

1

T1

82989

T2

61654

T3

5990

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	228345321	1			T1	94521		T2	83779		T3	6709
values[0x0]	101948315	1			T1	23898		T2	16347		T3	1578
values[0x1]	110289872	1			T1	25905		T2	17302		T3	1696

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	199795508	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

240788000

1

T1

97355

T2

76055

T3

6897

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1373739	1			T1	47		T2	26		T3	38
valid_sources[0x01]	1324284	1			T1	34		T2	28		T3	45
valid_sources[0x02]	1328930	1			T1	56		T2	30		T3	28
valid_sources[0x03]	2122900	1			T1	40		T2	32		T3	35
valid_sources[0x04]	1375866	1			T1	57		T2	34		T3	29
valid_sources[0x05]	2675173	1			T1	50		T2	25		T3	50
valid_sources[0x06]	1325027	1			T1	36		T2	33		T3	41
valid_sources[0x07]	5740431	1			T1	33		T2	28		T3	39
valid_sources[0x08]	1525301	1			T1	40		T2	35		T3	39
valid_sources[0x09]	1358904	1			T1	46		T2	33		T3	44
valid_sources[0x0a]	1329775	1			T1	39		T2	29		T3	47
valid_sources[0x0b]	1329896	1			T1	42		T2	28		T3	46
valid_sources[0x0c]	1321296	1			T1	32		T2	33		T3	36
valid_sources[0x0d]	5359110	1			T1	40		T2	32		T3	37
valid_sources[0x0e]	1321297	1			T1	47		T2	34		T3	42
valid_sources[0x0f]	1320402	1			T1	37		T2	26		T3	37
valid_sources[0x10]	2218455	1			T1	39		T2	36		T3	26
valid_sources[0x11]	1369120	1			T1	60		T2	36		T3	50
valid_sources[0x12]	2066902	1			T1	33		T2	38		T3	56
valid_sources[0x13]	1998944	1			T1	38		T2	29		T3	47
valid_sources[0x14]	1978064	1			T1	40		T2	30		T3	33
valid_sources[0x15]	1980452	1			T1	40		T2	24		T3	44
valid_sources[0x16]	5615908	1			T1	38		T2	26		T3	45
valid_sources[0x17]	1331019	1			T1	41		T2	35		T3	36
valid_sources[0x18]	1334741	1			T1	44		T2	37		T3	43
valid_sources[0x19]	1352506	1			T1	29		T2	28		T3	29
valid_sources[0x1a]	1322295	1			T1	33		T2	18		T3	40
valid_sources[0x1b]	2228587	1			T1	38		T2	36		T3	64
valid_sources[0x1c]	1317829	1			T1	40		T2	37		T3	22
valid_sources[0x1d]	1321487	1			T1	38		T2	31		T3	27
valid_sources[0x1e]	1328654	1			T1	47		T2	36		T3	41
valid_sources[0x1f]	1391581	1			T1	33		T2	24		T3	37
valid_sources[0x20]	1322782	1			T1	42		T2	30		T3	41
valid_sources[0x21]	3268076	1			T1	37		T2	33		T3	25
valid_sources[0x22]	1328124	1			T1	41		T2	44		T3	32
valid_sources[0x23]	1506689	1			T1	36		T2	36		T3	47
valid_sources[0x24]	1417821	1			T1	48		T2	31		T3	55
valid_sources[0x25]	1328797	1			T1	32		T2	35		T3	44
valid_sources[0x26]	1454326	1			T1	133942		T2	34		T3	47
valid_sources[0x27]	4184278	1			T1	40		T2	24		T3	42
valid_sources[0x28]	1332600	1			T1	39		T2	30		T3	17
valid_sources[0x29]	1324738	1			T1	36		T2	26		T3	62
valid_sources[0x2a]	1650002	1			T1	41		T2	37		T3	31
valid_sources[0x2b]	1321160	1			T1	55		T2	35		T3	21
valid_sources[0x2c]	1327600	1			T1	41		T2	36		T3	30
valid_sources[0x2d]	1333854	1			T1	27		T2	35		T3	37
valid_sources[0x2e]	1330364	1			T1	47		T2	34		T3	26
valid_sources[0x2f]	1659510	1			T1	31		T2	33		T3	66
valid_sources[0x30]	1441685	1			T1	31		T2	31		T3	26
valid_sources[0x31]	1343074	1			T1	52		T2	30		T3	47
valid_sources[0x32]	1426537	1			T1	50		T2	23		T3	21
valid_sources[0x33]	1320753	1			T1	34		T2	26		T3	36
valid_sources[0x34]	1328338	1			T1	43		T2	28		T3	38
valid_sources[0x35]	1320855	1			T1	43		T2	22		T3	49
valid_sources[0x36]	1475437	1			T1	40		T2	37		T3	33
valid_sources[0x37]	4024430	1			T1	44		T2	24		T3	45
valid_sources[0x38]	1332979	1			T1	53		T2	35		T3	32
valid_sources[0x39]	1329262	1			T1	41		T2	28		T3	60
valid_sources[0x3a]	1632703	1			T1	48		T2	32		T3	35
valid_sources[0x3b]	3658707	1			T1	42		T2	23		T3	51
valid_sources[0x3c]	1318726	1			T1	32		T2	24		T3	55
valid_sources[0x3d]	1336374	1			T1	35		T2	33		T3	38
valid_sources[0x3e]	1961425	1			T1	35		T2	40		T3	64
valid_sources[0x3f]	4562644	1			T1	32		T2	24		T3	56
valid_sources[0x40]	3305833	1			T1	43		T2	30		T3	45
valid_sources[0x41]	1320984	1			T1	34		T2	35		T3	67
valid_sources[0x42]	1331662	1			T1	31		T2	39		T3	23
valid_sources[0x43]	1320773	1			T1	43		T2	22		T3	27
valid_sources[0x44]	1346334	1			T1	34		T2	33		T3	52
valid_sources[0x45]	2187530	1			T1	26		T2	41		T3	38
valid_sources[0x46]	1446346	1			T1	42		T2	27		T3	33
valid_sources[0x47]	1461575	1			T1	33		T2	37		T3	41
valid_sources[0x48]	1334640	1			T1	48		T2	27		T3	31
valid_sources[0x49]	1343698	1			T1	44		T2	26		T3	32
valid_sources[0x4a]	1327538	1			T1	35		T2	30		T3	59
valid_sources[0x4b]	2114476	1			T1	44		T2	35		T3	19
valid_sources[0x4c]	2175320	1			T1	44		T2	34		T3	30
valid_sources[0x4d]	1330437	1			T1	41		T2	29		T3	27
valid_sources[0x4e]	2171762	1			T1	37		T2	30		T3	45
valid_sources[0x4f]	1322780	1			T1	40		T2	45		T3	35
valid_sources[0x50]	1436781	1			T1	49		T2	30		T3	36
valid_sources[0x51]	1324229	1			T1	41		T2	35		T3	36
valid_sources[0x52]	2328262	1			T1	44		T2	31		T3	37
valid_sources[0x53]	1323160	1			T1	33		T2	32		T3	56
valid_sources[0x54]	1392399	1			T1	32		T2	29		T3	46
valid_sources[0x55]	1325914	1			T1	27		T2	38		T3	39
valid_sources[0x56]	1319827	1			T1	35		T2	42		T3	30
valid_sources[0x57]	1779915	1			T1	44		T2	20		T3	35
valid_sources[0x58]	1330677	1			T1	40		T2	25		T3	26
valid_sources[0x59]	1982411	1			T1	37		T2	34		T3	38
valid_sources[0x5a]	1326798	1			T1	41		T2	34		T3	27
valid_sources[0x5b]	1324703	1			T1	35		T2	30		T3	52
valid_sources[0x5c]	1324757	1			T1	40		T2	33		T3	49
valid_sources[0x5d]	1331612	1			T1	40		T2	28		T3	39
valid_sources[0x5e]	1593383	1			T1	34		T2	26		T3	45
valid_sources[0x5f]	1323980	1			T1	41		T2	34		T3	50
valid_sources[0x60]	1331903	1			T1	55		T2	30		T3	36
valid_sources[0x61]	1348463	1			T1	40		T2	29		T3	46
valid_sources[0x62]	1324185	1			T1	40		T2	25		T3	49
valid_sources[0x63]	3672883	1			T1	44		T2	33		T3	36
valid_sources[0x64]	1978480	1			T1	49		T2	32		T3	30
valid_sources[0x65]	1318485	1			T1	48		T2	36		T3	29
valid_sources[0x66]	1966109	1			T1	36		T2	30		T3	30
valid_sources[0x67]	1366757	1			T1	49		T2	36		T3	67
valid_sources[0x68]	1350833	1			T1	44		T2	38		T3	28
valid_sources[0x69]	1323004	1			T1	54		T2	37		T3	41
valid_sources[0x6a]	1324192	1			T1	34		T2	16		T3	41
valid_sources[0x6b]	1323970	1			T1	31		T2	33		T3	36
valid_sources[0x6c]	1324856	1			T1	51		T2	26		T3	49
valid_sources[0x6d]	1321409	1			T1	50		T2	33		T3	32
valid_sources[0x6e]	1320094	1			T1	44		T2	33		T3	56
valid_sources[0x6f]	1325918	1			T1	44		T2	32		T3	30
valid_sources[0x70]	1327455	1			T1	38		T2	35		T3	35
valid_sources[0x71]	1353576	1			T1	29		T2	43		T3	44
valid_sources[0x72]	1324797	1			T1	36		T2	20		T3	36
valid_sources[0x73]	1335089	1			T1	40		T2	26		T3	39
valid_sources[0x74]	1330833	1			T1	44		T2	32		T3	47
valid_sources[0x75]	1843710	1			T1	32		T2	33		T3	20
valid_sources[0x76]	1320625	1			T1	41		T2	32		T3	38
valid_sources[0x77]	1317204	1			T1	39		T2	31		T3	23
valid_sources[0x78]	1338380	1			T1	38		T2	40		T3	45
valid_sources[0x79]	1324983	1			T1	31		T2	31		T3	42
valid_sources[0x7a]	2228488	1			T1	39		T2	28		T3	46
valid_sources[0x7b]	1330242	1			T1	45		T2	29		T3	65
valid_sources[0x7c]	3949937	1			T1	45		T2	28		T3	37
valid_sources[0x7d]	1804258	1			T1	32		T2	34		T3	49
valid_sources[0x7e]	1326517	1			T1	42		T2	31		T3	16
valid_sources[0x7f]	1987242	1			T1	38		T2	28		T3	32
valid_sources[0x80]	1983174	1			T1	42		T2	25		T3	33

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

71187813

1

T1

56451

T2

43358

T3

4223

values[0x0]

all_enables

biggest_size

60322227

1

T1

14241

T2

9914

T3

964

values[0x1]

all_enables

biggest_size

51947493

1

T1

12297

T2

8382

T3

803