Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 257255168 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 184820609 1 T1 218 T2 44096 T3 316518



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 228467485 1 T1 101 T2 59061 T3 390979
values[0x0] 102599360 1 T1 69 T2 12269 T3 120707
values[0x1] 111008932 1 T1 80 T2 12997 T3 126518



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 199840364 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 242235413 1 T1 227 T2 54366 T3 395343



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1344072 1 T2 417 T3 856 T7 17
valid_sources[0x01] 2254171 1 T1 1 T2 314 T3 684
valid_sources[0x02] 1345884 1 T2 265 T3 1070 T7 12
valid_sources[0x03] 2520389 1 T2 396 T3 821 T7 20
valid_sources[0x04] 1382343 1 T2 328 T3 887 T7 18
valid_sources[0x05] 1527651 1 T2 338 T3 663 T7 20
valid_sources[0x06] 1344112 1 T2 267 T3 567 T7 15
valid_sources[0x07] 1642985 1 T2 412 T3 1108 T7 29
valid_sources[0x08] 1347793 1 T2 182 T3 829 T7 21
valid_sources[0x09] 1808629 1 T2 386 T3 641 T7 24
valid_sources[0x0a] 3519360 1 T1 1 T2 362 T3 614
valid_sources[0x0b] 2494105 1 T2 250 T3 772 T7 20
valid_sources[0x0c] 1344945 1 T1 5 T2 308 T3 887
valid_sources[0x0d] 1352313 1 T1 1 T2 314 T3 693
valid_sources[0x0e] 1363951 1 T1 1 T2 392 T3 708
valid_sources[0x0f] 1340310 1 T1 1 T2 288 T3 518
valid_sources[0x10] 2385514 1 T2 426 T3 754 T7 22
valid_sources[0x11] 2234631 1 T1 2 T2 546 T3 809
valid_sources[0x12] 1353725 1 T2 214 T3 803 T7 17
valid_sources[0x13] 1349030 1 T2 341 T3 1161 T7 11
valid_sources[0x14] 1346270 1 T1 1 T2 284 T3 645
valid_sources[0x15] 3322947 1 T1 3 T2 547 T3 703
valid_sources[0x16] 1349524 1 T2 353 T3 820 T7 10
valid_sources[0x17] 1347815 1 T1 1 T2 500 T3 558
valid_sources[0x18] 1353068 1 T2 357 T3 951 T7 20
valid_sources[0x19] 1350611 1 T2 305 T3 841 T7 20
valid_sources[0x1a] 1348278 1 T1 3 T2 249 T3 745
valid_sources[0x1b] 1994189 1 T2 264 T3 776 T7 10
valid_sources[0x1c] 3672766 1 T2 409 T3 984 T7 15
valid_sources[0x1d] 1340048 1 T1 1 T2 412 T3 750
valid_sources[0x1e] 1353031 1 T1 5 T2 462 T3 1630
valid_sources[0x1f] 1342275 1 T1 1 T2 256 T3 731
valid_sources[0x20] 1985748 1 T1 2 T2 267 T3 853
valid_sources[0x21] 2141292 1 T2 278 T3 641 T7 21
valid_sources[0x22] 1343563 1 T2 370 T3 649 T7 20
valid_sources[0x23] 1350231 1 T2 254 T3 1564 T7 13
valid_sources[0x24] 3664739 1 T1 1 T2 325 T3 1241
valid_sources[0x25] 1578124 1 T1 2 T2 323 T3 630
valid_sources[0x26] 1351769 1 T2 204 T3 1752 T7 18
valid_sources[0x27] 1346903 1 T1 1 T2 334 T3 521
valid_sources[0x28] 1798337 1 T2 263 T3 619 T7 12
valid_sources[0x29] 1347931 1 T2 379 T3 637 T7 9
valid_sources[0x2a] 2275850 1 T2 346 T3 591 T7 19
valid_sources[0x2b] 1346567 1 T1 4 T2 270 T3 558
valid_sources[0x2c] 1430244 1 T2 380 T3 832 T7 19
valid_sources[0x2d] 1347102 1 T2 279 T3 684 T7 15
valid_sources[0x2e] 1346335 1 T2 284 T3 627 T7 13
valid_sources[0x2f] 2106768 1 T2 321 T3 689 T7 16
valid_sources[0x30] 1479716 1 T2 336 T3 564 T7 22
valid_sources[0x31] 1354602 1 T1 7 T2 378 T3 664
valid_sources[0x32] 1366592 1 T2 326 T3 570 T7 16
valid_sources[0x33] 3346124 1 T1 1 T2 295 T3 549
valid_sources[0x34] 1354273 1 T2 398 T3 1060 T7 20
valid_sources[0x35] 1482903 1 T2 219 T3 642 T7 22
valid_sources[0x36] 1366900 1 T1 1 T2 430 T3 1708
valid_sources[0x37] 1345900 1 T1 5 T2 254 T3 808
valid_sources[0x38] 1457260 1 T2 287 T3 681 T7 15
valid_sources[0x39] 3896037 1 T2 319 T3 700 T7 11
valid_sources[0x3a] 3690805 1 T1 2 T2 246 T3 826
valid_sources[0x3b] 1539481 1 T2 339 T3 186379 T7 13
valid_sources[0x3c] 1482150 1 T1 5 T2 236 T3 1289
valid_sources[0x3d] 1350316 1 T2 321 T3 1578 T7 20
valid_sources[0x3e] 1344691 1 T1 4 T2 327 T3 711
valid_sources[0x3f] 3232248 1 T1 3 T2 444 T3 747
valid_sources[0x40] 1342876 1 T1 3 T2 264 T3 794
valid_sources[0x41] 1396422 1 T2 168 T3 2443 T7 15
valid_sources[0x42] 2264962 1 T1 2 T2 326 T3 589
valid_sources[0x43] 1344055 1 T2 261 T3 565 T7 20
valid_sources[0x44] 1486496 1 T2 321 T3 669 T7 14
valid_sources[0x45] 1366967 1 T2 256 T3 772 T7 19
valid_sources[0x46] 1720899 1 T2 368 T3 808 T7 16
valid_sources[0x47] 1353387 1 T1 6 T2 376 T3 697
valid_sources[0x48] 1345054 1 T1 1 T2 287 T3 603
valid_sources[0x49] 1345161 1 T2 357 T3 745 T7 10
valid_sources[0x4a] 1491759 1 T1 1 T2 314 T3 933
valid_sources[0x4b] 1372873 1 T1 1 T2 437 T3 749
valid_sources[0x4c] 2031181 1 T2 292 T3 755 T7 18
valid_sources[0x4d] 1401571 1 T1 1 T2 258 T3 750
valid_sources[0x4e] 1341121 1 T2 267 T3 1595 T7 16
valid_sources[0x4f] 1351844 1 T2 250 T3 1609 T7 13
valid_sources[0x50] 1344640 1 T1 6 T2 355 T3 691
valid_sources[0x51] 2250471 1 T1 3 T2 231 T3 587
valid_sources[0x52] 1354571 1 T2 319 T3 592 T7 16
valid_sources[0x53] 1344254 1 T1 1 T2 344 T3 836
valid_sources[0x54] 1342059 1 T2 371 T3 1578 T7 20
valid_sources[0x55] 1355272 1 T1 4 T2 342 T3 1030
valid_sources[0x56] 1350057 1 T2 320 T3 812 T7 25
valid_sources[0x57] 1355238 1 T1 1 T2 211 T3 851
valid_sources[0x58] 1340231 1 T1 1 T2 349 T3 889
valid_sources[0x59] 3288320 1 T1 1 T2 489 T3 772
valid_sources[0x5a] 1346713 1 T2 379 T3 517 T7 16
valid_sources[0x5b] 1342963 1 T1 2 T2 324 T3 598
valid_sources[0x5c] 1342237 1 T2 359 T3 997 T7 13
valid_sources[0x5d] 3321155 1 T2 363 T3 920 T7 18
valid_sources[0x5e] 3511811 1 T1 2 T2 281 T3 680
valid_sources[0x5f] 3434466 1 T1 1 T2 334 T3 1643
valid_sources[0x60] 1349241 1 T2 307 T3 668 T7 15
valid_sources[0x61] 3579848 1 T2 368 T3 689 T7 17
valid_sources[0x62] 1351141 1 T1 2 T2 338 T3 695
valid_sources[0x63] 3658450 1 T2 305 T3 715 T7 21
valid_sources[0x64] 3519067 1 T1 3 T2 343 T3 869
valid_sources[0x65] 3679392 1 T1 4 T2 359 T3 513
valid_sources[0x66] 1346892 1 T1 1 T2 352 T3 963
valid_sources[0x67] 1346351 1 T2 297 T3 973 T7 12
valid_sources[0x68] 1438440 1 T2 274 T3 724 T7 13
valid_sources[0x69] 1344270 1 T2 394 T3 763 T7 23
valid_sources[0x6a] 1347622 1 T1 4 T2 300 T3 948
valid_sources[0x6b] 1348367 1 T2 403 T3 1114 T7 18
valid_sources[0x6c] 1344239 1 T2 328 T3 594 T7 17
valid_sources[0x6d] 1347749 1 T2 316 T3 1419 T7 15
valid_sources[0x6e] 1346245 1 T2 422 T3 1330 T7 17
valid_sources[0x6f] 1348128 1 T1 1 T2 475 T3 824
valid_sources[0x70] 2016898 1 T1 1 T2 279 T3 753
valid_sources[0x71] 1399677 1 T2 214 T3 995 T7 17
valid_sources[0x72] 1484074 1 T2 322 T3 1921 T7 14
valid_sources[0x73] 1387118 1 T1 1 T2 350 T3 678
valid_sources[0x74] 1344250 1 T1 1 T2 354 T3 956
valid_sources[0x75] 1350950 1 T2 273 T3 631 T7 11
valid_sources[0x76] 1416262 1 T1 3 T2 289 T3 788
valid_sources[0x77] 2198572 1 T2 388 T3 570 T7 17
valid_sources[0x78] 1347580 1 T2 267 T3 696 T7 16
valid_sources[0x79] 1346163 1 T1 2 T2 387 T3 806
valid_sources[0x7a] 1343516 1 T1 1 T2 312 T3 3013
valid_sources[0x7b] 1477938 1 T2 238 T3 1060 T7 20
valid_sources[0x7c] 1341278 1 T2 451 T3 1382 T7 11
valid_sources[0x7d] 1350404 1 T2 327 T3 863 T7 19
valid_sources[0x7e] 1354333 1 T2 205 T3 1189 T7 21
valid_sources[0x7f] 2911960 1 T1 3 T2 409 T3 662
valid_sources[0x80] 2683564 1 T1 1 T2 294 T3 648



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 71382136 1 T1 90 T2 29627 T3 142783
values[0x0] all_enables biggest_size 60906926 1 T1 60 T2 7723 T3 89901
values[0x1] all_enables biggest_size 52531547 1 T1 68 T2 6746 T3 83834

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%