Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	260987867	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

186031610

1

T1

6586

T2

17727

T3

809280

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	231535457	1			T1	7307		T2	12851		T3	101992
values[0x0]	103536371	1			T1	1605		T2	4380		T3	449332
values[0x1]	111947649	1			T1	1722		T2	4445		T3	480135

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	202833442	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

244186035

1

T1

7566

T2

18754

T3

106099

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2011297	1			T1	1		T2	99		T7	637
valid_sources[0x01]	1350956	1			T2	91		T7	556		T4	25
valid_sources[0x02]	1354860	1			T1	2		T2	81		T7	530
valid_sources[0x03]	1360987	1			T1	3		T2	105		T7	582
valid_sources[0x04]	1812866	1			T2	93		T7	556		T4	35
valid_sources[0x05]	1563945	1			T2	76		T7	574		T4	100
valid_sources[0x06]	2043866	1			T1	2		T2	102		T7	544
valid_sources[0x07]	1353893	1			T1	1		T2	118		T7	598
valid_sources[0x08]	1358746	1			T2	75		T7	628		T4	84
valid_sources[0x09]	1389861	1			T2	85		T7	590		T4	74
valid_sources[0x0a]	2040046	1			T1	2		T2	94		T7	554
valid_sources[0x0b]	1445572	1			T2	74		T7	546		T4	45
valid_sources[0x0c]	1358216	1			T1	1		T2	89		T7	565
valid_sources[0x0d]	1801957	1			T2	63		T7	577		T4	108
valid_sources[0x0e]	2447043	1			T2	77		T7	556		T4	75
valid_sources[0x0f]	1344100	1			T2	95		T7	501		T4	56
valid_sources[0x10]	3711530	1			T1	1		T2	80		T7	513
valid_sources[0x11]	1362800	1			T1	4		T2	91		T7	598
valid_sources[0x12]	1951518	1			T1	1		T2	85		T7	567
valid_sources[0x13]	1358676	1			T2	79		T7	592		T4	68
valid_sources[0x14]	1357984	1			T2	77		T7	634		T4	49
valid_sources[0x15]	1357546	1			T1	3		T2	81		T7	525
valid_sources[0x16]	1359750	1			T1	10312		T2	75		T7	618
valid_sources[0x17]	1348712	1			T1	1		T2	93		T7	588
valid_sources[0x18]	2413480	1			T2	101		T7	562		T4	62
valid_sources[0x19]	1362752	1			T1	2		T2	92		T7	519
valid_sources[0x1a]	1801295	1			T1	4		T2	96		T7	560
valid_sources[0x1b]	1393409	1			T1	3		T2	105		T7	546
valid_sources[0x1c]	2016278	1			T2	94		T7	540		T4	33
valid_sources[0x1d]	1345754	1			T1	2		T2	81		T7	527
valid_sources[0x1e]	1355960	1			T1	2		T2	70		T7	567
valid_sources[0x1f]	1814143	1			T1	3		T2	72		T7	564
valid_sources[0x20]	1349206	1			T1	2		T2	95		T7	594
valid_sources[0x21]	1356582	1			T1	1		T2	101		T7	576
valid_sources[0x22]	2256730	1			T1	1		T2	78		T7	607
valid_sources[0x23]	1813974	1			T2	96		T7	547		T4	16
valid_sources[0x24]	1354420	1			T1	3		T2	89		T7	532
valid_sources[0x25]	1356023	1			T1	1		T2	90		T7	566
valid_sources[0x26]	2270923	1			T1	2		T2	78		T7	514
valid_sources[0x27]	1913663	1			T1	2		T2	65		T7	524
valid_sources[0x28]	2423486	1			T1	2		T2	107		T7	582
valid_sources[0x29]	1353763	1			T1	1		T2	108		T7	537
valid_sources[0x2a]	1352938	1			T1	2		T2	72		T7	572
valid_sources[0x2b]	1355343	1			T1	4		T2	63		T7	545
valid_sources[0x2c]	3831443	1			T1	1		T2	90		T7	558
valid_sources[0x2d]	1354474	1			T1	1		T2	83		T7	560
valid_sources[0x2e]	2075415	1			T1	2		T2	82		T7	561
valid_sources[0x2f]	1359508	1			T1	1		T2	99		T7	542
valid_sources[0x30]	1356566	1			T1	1		T2	90		T7	525
valid_sources[0x31]	1394025	1			T1	1		T2	88		T7	576
valid_sources[0x32]	1359226	1			T2	85		T7	590		T4	44
valid_sources[0x33]	1356627	1			T1	4		T2	71		T7	533
valid_sources[0x34]	2702467	1			T2	79		T7	556		T4	86
valid_sources[0x35]	1352863	1			T2	89		T7	547		T4	68
valid_sources[0x36]	1360581	1			T2	62		T7	558		T4	66
valid_sources[0x37]	2030165	1			T1	2		T2	97		T7	527
valid_sources[0x38]	1354750	1			T1	2		T2	76		T7	486
valid_sources[0x39]	1356447	1			T1	3		T2	87		T7	573
valid_sources[0x3a]	1352323	1			T1	4		T2	54		T7	566
valid_sources[0x3b]	3697598	1			T1	2		T2	77		T7	585
valid_sources[0x3c]	2232368	1			T1	3		T2	81		T7	564
valid_sources[0x3d]	1361348	1			T1	1		T2	85		T7	505
valid_sources[0x3e]	2568033	1			T1	3		T2	83		T7	524
valid_sources[0x3f]	1506828	1			T1	2		T2	85		T7	530
valid_sources[0x40]	1349605	1			T1	1		T2	111		T7	588
valid_sources[0x41]	2044069	1			T1	2		T2	81		T7	551
valid_sources[0x42]	1351700	1			T1	2		T2	82		T7	528
valid_sources[0x43]	3662432	1			T1	4		T2	99		T7	538
valid_sources[0x44]	3674032	1			T2	84		T7	545		T4	75
valid_sources[0x45]	1360914	1			T1	1		T2	65		T7	572
valid_sources[0x46]	1356920	1			T1	3		T2	80		T7	602
valid_sources[0x47]	1783085	1			T2	82		T7	598		T4	107
valid_sources[0x48]	1351231	1			T2	78		T7	572		T4	91
valid_sources[0x49]	2196718	1			T2	93		T7	595		T4	77
valid_sources[0x4a]	1358187	1			T1	3		T2	85		T7	560
valid_sources[0x4b]	1408181	1			T1	1		T2	75		T7	585
valid_sources[0x4c]	1471728	1			T1	3		T2	98		T7	568
valid_sources[0x4d]	1359064	1			T1	2		T2	59		T7	577
valid_sources[0x4e]	1350005	1			T1	1		T2	81		T7	593
valid_sources[0x4f]	1349765	1			T1	1		T2	79		T7	558
valid_sources[0x50]	1347733	1			T2	69		T7	554		T4	77
valid_sources[0x51]	1355920	1			T1	1		T2	93		T7	516
valid_sources[0x52]	1357221	1			T1	1		T2	59		T7	527
valid_sources[0x53]	1351705	1			T2	96		T7	548		T4	53
valid_sources[0x54]	1350779	1			T1	2		T2	139		T7	492
valid_sources[0x55]	1357830	1			T2	77		T7	546		T4	43
valid_sources[0x56]	1346383	1			T1	1		T2	92		T7	552
valid_sources[0x57]	1349643	1			T1	3		T2	91		T7	583
valid_sources[0x58]	2003422	1			T2	80		T7	543		T4	51
valid_sources[0x59]	1799015	1			T1	3		T2	83		T7	505
valid_sources[0x5a]	1362486	1			T1	1		T2	46		T7	543
valid_sources[0x5b]	2381819	1			T1	1		T2	102		T7	527
valid_sources[0x5c]	1357580	1			T2	109		T7	577		T4	100
valid_sources[0x5d]	1354419	1			T2	69		T7	539		T4	107
valid_sources[0x5e]	1349820	1			T1	3		T2	86		T7	553
valid_sources[0x5f]	1379577	1			T1	4		T2	93		T7	528
valid_sources[0x60]	1356113	1			T1	2		T2	73		T7	576
valid_sources[0x61]	2979431	1			T1	2		T2	71		T7	585
valid_sources[0x62]	1360068	1			T1	1		T2	80		T7	567
valid_sources[0x63]	1356789	1			T1	1		T2	102		T7	517
valid_sources[0x64]	2213539	1			T1	3		T2	94		T7	509
valid_sources[0x65]	1356307	1			T1	1		T2	79		T7	472
valid_sources[0x66]	1353131	1			T1	1		T2	69		T7	510
valid_sources[0x67]	1992572	1			T1	2		T2	61		T7	593
valid_sources[0x68]	1516697	1			T2	48		T7	559		T4	46
valid_sources[0x69]	1349541	1			T1	2		T2	81		T7	607
valid_sources[0x6a]	1367618	1			T2	93		T7	547		T4	123
valid_sources[0x6b]	2253519	1			T1	1		T2	66		T7	585
valid_sources[0x6c]	1352770	1			T1	2		T2	98		T7	525
valid_sources[0x6d]	1348194	1			T1	1		T2	80		T7	585
valid_sources[0x6e]	1538005	1			T1	2		T2	94		T7	568
valid_sources[0x6f]	1354567	1			T1	3		T2	90		T7	533
valid_sources[0x70]	1382208	1			T1	1		T2	72		T7	529
valid_sources[0x71]	1347946	1			T2	92		T7	565		T4	14
valid_sources[0x72]	1356160	1			T2	83		T7	556		T4	64
valid_sources[0x73]	2204203	1			T1	2		T2	84		T7	586
valid_sources[0x74]	1478800	1			T1	1		T2	81		T7	544
valid_sources[0x75]	1905014	1			T1	1		T2	92		T7	582
valid_sources[0x76]	4347817	1			T2	79		T7	580		T4	50
valid_sources[0x77]	1361292	1			T1	1		T2	78		T7	578
valid_sources[0x78]	1478621	1			T1	2		T2	82		T7	567
valid_sources[0x79]	2100832	1			T2	71		T7	561		T4	80
valid_sources[0x7a]	1799898	1			T2	90		T7	510		T4	52
valid_sources[0x7b]	1361467	1			T2	68		T7	559		T4	52
valid_sources[0x7c]	1345198	1			T1	2		T2	116		T7	582
valid_sources[0x7d]	1440375	1			T2	78		T7	610		T4	51
valid_sources[0x7e]	4293256	1			T1	2		T2	90		T7	543
valid_sources[0x7f]	2258952	1			T2	94		T7	551		T4	38
valid_sources[0x80]	1375421	1			T1	1		T2	66		T7	533

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

72065912

1

T1

4627

T2

10584

T3

319493

values[0x0]

all_enables

biggest_size

61232350

1

T1

1027

T2

3593

T3

264465

values[0x1]

all_enables

biggest_size

52733348

1

T1

932

T2

3550

T3

225322