Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
169491 |
1 |
|
|
T2 |
150 |
|
T7 |
254 |
|
T8 |
679 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
85258 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
64295 |
1 |
|
|
T2 |
148 |
|
T7 |
251 |
|
T8 |
20 |
seven_bytes |
2813 |
1 |
|
|
T8 |
20 |
|
T20 |
9 |
|
T19 |
32 |
six_bytes |
2830 |
1 |
|
|
T8 |
18 |
|
T20 |
10 |
|
T19 |
36 |
five_bytes |
2936 |
1 |
|
|
T8 |
13 |
|
T20 |
20 |
|
T19 |
30 |
four_bytes |
2864 |
1 |
|
|
T8 |
21 |
|
T20 |
15 |
|
T19 |
35 |
three_bytes |
2834 |
1 |
|
|
T8 |
26 |
|
T20 |
10 |
|
T19 |
40 |
two_bytes |
2853 |
1 |
|
|
T8 |
15 |
|
T20 |
11 |
|
T19 |
25 |
one_byte |
2808 |
1 |
|
|
T8 |
11 |
|
T20 |
16 |
|
T19 |
27 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
166237 |
1 |
|
|
T2 |
146 |
|
T7 |
248 |
|
T8 |
669 |
auto[1] |
3254 |
1 |
|
|
T2 |
4 |
|
T7 |
6 |
|
T8 |
10 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
169491 |
1 |
|
|
T2 |
150 |
|
T7 |
254 |
|
T8 |
679 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
169481 |
1 |
|
|
T2 |
150 |
|
T7 |
254 |
|
T8 |
679 |
auto[1] |
10 |
1 |
|
|
T166 |
2 |
|
T167 |
1 |
|
T168 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1165 |
1 |
|
|
T2 |
2 |
|
T7 |
3 |
|
T8 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3254 |
1 |
|
|
T2 |
4 |
|
T7 |
6 |
|
T8 |
10 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
167356 |
1 |
|
|
T2 |
100 |
|
T7 |
391 |
|
T8 |
769 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
83914 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
63214 |
1 |
|
|
T2 |
99 |
|
T7 |
384 |
|
T8 |
16 |
seven_bytes |
2848 |
1 |
|
|
T8 |
28 |
|
T20 |
25 |
|
T19 |
30 |
six_bytes |
2952 |
1 |
|
|
T8 |
18 |
|
T20 |
16 |
|
T19 |
40 |
five_bytes |
2863 |
1 |
|
|
T8 |
18 |
|
T20 |
14 |
|
T19 |
31 |
four_bytes |
2933 |
1 |
|
|
T8 |
17 |
|
T20 |
30 |
|
T19 |
36 |
three_bytes |
2898 |
1 |
|
|
T8 |
21 |
|
T20 |
19 |
|
T19 |
30 |
two_bytes |
2868 |
1 |
|
|
T8 |
24 |
|
T20 |
17 |
|
T19 |
36 |
one_byte |
2866 |
1 |
|
|
T8 |
16 |
|
T20 |
18 |
|
T19 |
34 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164182 |
1 |
|
|
T2 |
98 |
|
T7 |
377 |
|
T8 |
761 |
auto[1] |
3174 |
1 |
|
|
T2 |
2 |
|
T7 |
14 |
|
T8 |
8 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
167356 |
1 |
|
|
T2 |
100 |
|
T7 |
391 |
|
T8 |
769 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
167346 |
1 |
|
|
T2 |
100 |
|
T7 |
391 |
|
T8 |
769 |
auto[1] |
10 |
1 |
|
|
T17 |
1 |
|
T169 |
1 |
|
T170 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1126 |
1 |
|
|
T2 |
1 |
|
T7 |
7 |
|
T14 |
6 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3174 |
1 |
|
|
T2 |
2 |
|
T7 |
14 |
|
T8 |
8 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
333033 |
1 |
|
|
T2 |
393 |
|
T7 |
809 |
|
T8 |
3212 |
auto[1] |
443 |
1 |
|
|
T9 |
40 |
|
T10 |
32 |
|
T11 |
107 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
168598 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
125103 |
1 |
|
|
T2 |
387 |
|
T7 |
799 |
|
T8 |
76 |
seven_bytes |
5735 |
1 |
|
|
T8 |
88 |
|
T20 |
46 |
|
T19 |
37 |
six_bytes |
5693 |
1 |
|
|
T8 |
98 |
|
T20 |
36 |
|
T19 |
38 |
five_bytes |
5767 |
1 |
|
|
T8 |
89 |
|
T20 |
40 |
|
T19 |
41 |
four_bytes |
5644 |
1 |
|
|
T8 |
94 |
|
T20 |
48 |
|
T19 |
39 |
three_bytes |
5716 |
1 |
|
|
T8 |
78 |
|
T20 |
41 |
|
T19 |
32 |
two_bytes |
5619 |
1 |
|
|
T8 |
94 |
|
T20 |
39 |
|
T19 |
21 |
one_byte |
5601 |
1 |
|
|
T8 |
62 |
|
T20 |
43 |
|
T19 |
44 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
326950 |
1 |
|
|
T2 |
381 |
|
T7 |
789 |
|
T8 |
3174 |
auto[1] |
6526 |
1 |
|
|
T2 |
12 |
|
T7 |
20 |
|
T8 |
38 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
333476 |
1 |
|
|
T2 |
393 |
|
T7 |
809 |
|
T8 |
3212 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
333453 |
1 |
|
|
T2 |
393 |
|
T7 |
809 |
|
T8 |
3211 |
auto[1] |
23 |
1 |
|
|
T8 |
1 |
|
T171 |
1 |
|
T172 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2316 |
1 |
|
|
T2 |
6 |
|
T7 |
10 |
|
T8 |
5 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6526 |
1 |
|
|
T2 |
12 |
|
T7 |
20 |
|
T8 |
38 |