Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 261264111 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 185954776 1 T1 167 T2 10990 T3 5963



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 231868319 1 T1 79 T2 12529 T3 6588
values[0x0] 103396866 1 T1 52 T2 3090 T3 1519
values[0x1] 111953702 1 T1 63 T2 3328 T3 1539



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 202891336 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 244327551 1 T1 174 T2 12875 T3 6804



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1525885 1 T1 3 T2 85 T3 3
valid_sources[0x01] 1372406 1 T2 113 T3 3 T37 7643
valid_sources[0x02] 1381177 1 T2 75 T3 3 T37 7743
valid_sources[0x03] 2455453 1 T2 56 T3 1 T37 7645
valid_sources[0x04] 1376876 1 T2 72 T37 7515 T35 1721
valid_sources[0x05] 2486718 1 T2 85 T3 3 T37 7838
valid_sources[0x06] 2211521 1 T2 83 T3 1 T37 7630
valid_sources[0x07] 1381474 1 T2 80 T3 1 T37 7538
valid_sources[0x08] 1497217 1 T2 76 T3 1 T37 7731
valid_sources[0x09] 1375100 1 T1 1 T2 51 T3 4
valid_sources[0x0a] 1375852 1 T2 72 T3 6 T37 7807
valid_sources[0x0b] 1381545 1 T1 2 T2 79 T3 2
valid_sources[0x0c] 1491780 1 T2 61 T3 3 T37 7643
valid_sources[0x0d] 1378052 1 T2 104 T3 6 T37 7835
valid_sources[0x0e] 1538888 1 T2 79 T3 2 T37 7604
valid_sources[0x0f] 1419478 1 T2 82 T3 3 T37 7699
valid_sources[0x10] 2278117 1 T1 4 T2 64 T3 4
valid_sources[0x11] 1377733 1 T2 66 T3 1 T37 7991
valid_sources[0x12] 1430314 1 T2 55 T3 4 T37 7740
valid_sources[0x13] 1375427 1 T2 90 T37 7696 T35 1796
valid_sources[0x14] 1383668 1 T1 2 T2 82 T3 3
valid_sources[0x15] 1375073 1 T1 2 T2 39 T3 3
valid_sources[0x16] 1579443 1 T1 1 T2 70 T3 3
valid_sources[0x17] 1449545 1 T1 2 T2 76 T3 2
valid_sources[0x18] 1501388 1 T2 85 T3 2 T37 7532
valid_sources[0x19] 1520781 1 T1 1 T2 91 T3 3
valid_sources[0x1a] 1400528 1 T1 5 T2 79 T3 3
valid_sources[0x1b] 1451535 1 T1 1 T2 66 T3 5
valid_sources[0x1c] 1382218 1 T2 84 T3 2 T37 7726
valid_sources[0x1d] 2044889 1 T1 1 T2 83 T3 6
valid_sources[0x1e] 1378987 1 T1 2 T2 69 T3 2
valid_sources[0x1f] 2025217 1 T2 62 T3 5 T37 7829
valid_sources[0x20] 1452155 1 T1 1 T2 65 T3 1
valid_sources[0x21] 2035758 1 T2 66 T3 1 T37 7656
valid_sources[0x22] 1558987 1 T2 72 T3 3 T37 7755
valid_sources[0x23] 1380383 1 T2 67 T3 4 T37 7848
valid_sources[0x24] 1383676 1 T2 51 T3 2 T37 7626
valid_sources[0x25] 1700579 1 T2 83 T3 2 T37 7573
valid_sources[0x26] 1372427 1 T2 102 T3 3 T37 7652
valid_sources[0x27] 1435344 1 T1 2 T2 52 T3 1
valid_sources[0x28] 1572291 1 T1 1 T2 94 T3 2
valid_sources[0x29] 2168280 1 T2 86 T3 2 T37 7783
valid_sources[0x2a] 1379102 1 T2 68 T3 3 T37 7518
valid_sources[0x2b] 1381210 1 T2 74 T3 2 T37 7572
valid_sources[0x2c] 1794839 1 T2 87 T3 8 T37 7563
valid_sources[0x2d] 1376925 1 T1 1 T2 57 T3 3
valid_sources[0x2e] 1835234 1 T2 91 T3 7 T37 7689
valid_sources[0x2f] 2006590 1 T2 87 T3 3 T37 7779
valid_sources[0x30] 1833387 1 T2 83 T3 5 T37 7695
valid_sources[0x31] 1383633 1 T1 1 T2 66 T3 2
valid_sources[0x32] 1576705 1 T1 1 T2 61 T3 3
valid_sources[0x33] 2240231 1 T2 64 T3 1 T37 7620
valid_sources[0x34] 1763278 1 T1 1 T2 78 T3 7
valid_sources[0x35] 1820508 1 T2 51 T3 3 T21 442821
valid_sources[0x36] 1384557 1 T2 77 T3 3 T37 7645
valid_sources[0x37] 3732909 1 T1 1 T2 88 T3 4
valid_sources[0x38] 1395862 1 T2 69 T3 3 T37 7631
valid_sources[0x39] 1906072 1 T2 100 T3 2 T37 7746
valid_sources[0x3a] 2293467 1 T1 1 T2 84 T3 2
valid_sources[0x3b] 1372359 1 T1 3 T2 74 T3 1
valid_sources[0x3c] 3712152 1 T1 1 T2 58 T3 6
valid_sources[0x3d] 2732412 1 T1 2 T2 81 T3 5
valid_sources[0x3e] 1385501 1 T2 73 T3 4 T37 7615
valid_sources[0x3f] 1386167 1 T1 1 T2 73 T3 8896
valid_sources[0x40] 1381769 1 T1 1 T2 73 T3 2
valid_sources[0x41] 1369817 1 T2 57 T3 6 T37 7573
valid_sources[0x42] 1409128 1 T1 2 T2 73 T3 2
valid_sources[0x43] 1417958 1 T1 1 T2 59 T3 3
valid_sources[0x44] 1380212 1 T2 79 T3 1 T37 7707
valid_sources[0x45] 1384211 1 T1 2 T2 61 T3 2
valid_sources[0x46] 1586940 1 T2 71 T3 3 T37 7791
valid_sources[0x47] 1376386 1 T2 88 T3 1 T37 7644
valid_sources[0x48] 1381302 1 T1 1 T2 47 T3 7
valid_sources[0x49] 2036439 1 T2 52 T3 2 T37 7548
valid_sources[0x4a] 4212777 1 T2 70 T37 7719 T35 1632
valid_sources[0x4b] 1400572 1 T2 56 T3 6 T37 7732
valid_sources[0x4c] 5701798 1 T2 42 T37 7596 T4 1
valid_sources[0x4d] 2214228 1 T2 73 T3 3 T37 7764
valid_sources[0x4e] 4586516 1 T1 3 T2 82 T3 7
valid_sources[0x4f] 1374922 1 T2 71 T3 1 T37 7583
valid_sources[0x50] 1377320 1 T1 1 T2 80 T3 2
valid_sources[0x51] 1374402 1 T2 96 T3 4 T37 7700
valid_sources[0x52] 1373112 1 T1 4 T2 53 T3 5
valid_sources[0x53] 1384333 1 T2 78 T3 2 T37 7702
valid_sources[0x54] 1381311 1 T2 62 T3 3 T37 7700
valid_sources[0x55] 1466042 1 T1 1 T2 65 T3 2
valid_sources[0x56] 1451090 1 T1 1 T2 65 T3 1
valid_sources[0x57] 4266940 1 T2 68 T3 3 T37 7860
valid_sources[0x58] 3825484 1 T2 72 T37 7883 T35 1781
valid_sources[0x59] 1529657 1 T2 82 T3 2 T37 7457
valid_sources[0x5a] 1373265 1 T2 82 T3 2 T37 7657
valid_sources[0x5b] 1386655 1 T2 94 T3 2 T37 7669
valid_sources[0x5c] 2303684 1 T2 68 T3 2 T37 7679
valid_sources[0x5d] 2247539 1 T2 85 T3 2 T37 7862
valid_sources[0x5e] 1388332 1 T2 62 T3 1 T37 7692
valid_sources[0x5f] 1388236 1 T2 79 T3 4 T37 7576
valid_sources[0x60] 1375191 1 T1 2 T2 56 T3 4
valid_sources[0x61] 1387287 1 T1 1 T2 79 T3 1
valid_sources[0x62] 1447634 1 T1 1 T2 75 T3 3
valid_sources[0x63] 1532665 1 T2 91 T3 1 T37 7642
valid_sources[0x64] 2036639 1 T2 67 T37 7626 T35 1725
valid_sources[0x65] 1377013 1 T2 65 T3 4 T37 7655
valid_sources[0x66] 2279976 1 T2 63 T3 2 T37 7512
valid_sources[0x67] 1563546 1 T2 75 T3 1 T37 7838
valid_sources[0x68] 1389691 1 T1 2 T2 82 T3 3
valid_sources[0x69] 1382453 1 T2 102 T37 7587 T35 1686
valid_sources[0x6a] 1381681 1 T2 73 T3 3 T37 7652
valid_sources[0x6b] 1380331 1 T1 1 T2 67 T3 3
valid_sources[0x6c] 1537876 1 T2 66 T3 1 T37 7618
valid_sources[0x6d] 1530884 1 T2 63 T3 4 T37 7591
valid_sources[0x6e] 3369164 1 T1 1 T2 67 T3 2
valid_sources[0x6f] 1377330 1 T2 69 T3 5 T37 7651
valid_sources[0x70] 1379165 1 T2 83 T3 4 T37 7670
valid_sources[0x71] 1376347 1 T2 83 T3 3 T37 7722
valid_sources[0x72] 1391597 1 T1 2 T2 65 T3 1
valid_sources[0x73] 1378707 1 T2 51 T3 3 T37 7667
valid_sources[0x74] 1475104 1 T2 92 T3 2 T37 7765
valid_sources[0x75] 2181521 1 T1 1 T2 89 T3 4
valid_sources[0x76] 3353479 1 T2 116 T3 4 T37 7580
valid_sources[0x77] 1501883 1 T1 1 T2 91 T3 2
valid_sources[0x78] 1381710 1 T1 2 T2 63 T3 1
valid_sources[0x79] 1456656 1 T1 2 T2 85 T37 7699
valid_sources[0x7a] 1435984 1 T1 2 T2 87 T3 2
valid_sources[0x7b] 1382855 1 T2 95 T3 3 T37 7629
valid_sources[0x7c] 1393318 1 T2 77 T3 3 T37 7700
valid_sources[0x7d] 1380026 1 T1 5 T2 88 T3 2
valid_sources[0x7e] 1899808 1 T2 76 T3 8 T37 7949
valid_sources[0x7f] 4298087 1 T2 69 T3 4 T37 7709
valid_sources[0x80] 1379779 1 T1 1 T2 64 T3 9



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 71854234 1 T1 72 T2 7477 T3 4133
values[0x0] all_enables biggest_size 61273417 1 T1 46 T2 1899 T3 965
values[0x1] all_enables biggest_size 52827125 1 T1 49 T2 1614 T3 865

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%