Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 263211311 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 186938397 1 T1 100 T2 60849 T3 326941



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 233568901 1 T1 45 T2 68237 T3 423683
values[0x0] 104052889 1 T1 51 T2 16278 T3 203840
values[0x1] 112527918 1 T1 54 T2 17502 T3 219332



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 204515754 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 245633954 1 T1 117 T2 70366 T3 440329



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1422320 1 T2 417 T17 21 T7 34
valid_sources[0x01] 1340355 1 T2 412 T7 22 T33 1779
valid_sources[0x02] 1474699 1 T1 1 T2 428 T7 39
valid_sources[0x03] 1366887 1 T2 432 T7 21 T33 1810
valid_sources[0x04] 1352618 1 T2 383 T7 22 T33 1659
valid_sources[0x05] 1340721 1 T2 417 T7 25 T33 1791
valid_sources[0x06] 1452927 1 T2 415 T17 51 T7 112990
valid_sources[0x07] 2268704 1 T1 1 T2 377 T7 32
valid_sources[0x08] 1336749 1 T1 1 T2 414 T7 33
valid_sources[0x09] 2494830 1 T2 414 T7 28 T33 1785
valid_sources[0x0a] 1431819 1 T1 2 T2 406 T17 8
valid_sources[0x0b] 2230202 1 T2 370 T7 22 T33 1727
valid_sources[0x0c] 2262203 1 T1 1 T2 369 T7 36
valid_sources[0x0d] 1344593 1 T2 357 T17 20 T7 26
valid_sources[0x0e] 1346308 1 T1 1 T2 416 T17 4
valid_sources[0x0f] 1329564 1 T1 1 T2 380 T17 2
valid_sources[0x10] 1348556 1 T1 2 T2 445 T17 2
valid_sources[0x11] 1336085 1 T2 349 T17 7 T7 28
valid_sources[0x12] 1344161 1 T1 1 T2 421 T7 25
valid_sources[0x13] 1338730 1 T2 390 T7 23 T33 1812
valid_sources[0x14] 1336841 1 T2 402 T17 14 T7 29
valid_sources[0x15] 1344048 1 T2 402 T7 29 T33 1747
valid_sources[0x16] 1342975 1 T2 406 T17 9 T7 20
valid_sources[0x17] 3688552 1 T2 418 T17 1 T7 28
valid_sources[0x18] 1354644 1 T2 386 T17 58 T7 35
valid_sources[0x19] 1469418 1 T2 388 T17 10 T7 31
valid_sources[0x1a] 1344800 1 T1 1 T2 356 T7 25
valid_sources[0x1b] 1351119 1 T2 418 T7 36 T33 1729
valid_sources[0x1c] 1343936 1 T1 1 T2 375 T17 3
valid_sources[0x1d] 2205626 1 T2 394 T7 34 T33 1667
valid_sources[0x1e] 3704997 1 T1 1 T2 410 T17 8
valid_sources[0x1f] 1341737 1 T1 1 T2 396 T17 16
valid_sources[0x20] 1339190 1 T1 1 T2 396 T7 27
valid_sources[0x21] 1346903 1 T1 1 T2 385 T17 2
valid_sources[0x22] 2195765 1 T2 424 T7 25 T33 1765
valid_sources[0x23] 1342559 1 T2 393 T17 4 T7 27
valid_sources[0x24] 1341884 1 T2 404 T7 24 T33 1728
valid_sources[0x25] 2343642 1 T1 2 T2 386 T7 26
valid_sources[0x26] 1425645 1 T2 386 T17 15 T7 22
valid_sources[0x27] 1460035 1 T2 403 T17 22 T7 30
valid_sources[0x28] 1346277 1 T2 395 T17 7 T7 21
valid_sources[0x29] 1350136 1 T1 1 T2 390 T7 33
valid_sources[0x2a] 1364734 1 T2 390 T17 22 T7 18
valid_sources[0x2b] 1673850 1 T2 389 T7 19 T33 1728
valid_sources[0x2c] 1342592 1 T1 2 T2 392 T17 9
valid_sources[0x2d] 3307664 1 T2 417 T7 28 T33 1892
valid_sources[0x2e] 3680019 1 T2 398 T7 26 T33 1770
valid_sources[0x2f] 3339759 1 T2 423 T7 28 T33 1762
valid_sources[0x30] 3717090 1 T2 434 T17 29 T7 36
valid_sources[0x31] 1347293 1 T1 2 T2 427 T17 20
valid_sources[0x32] 1989578 1 T2 401 T17 10 T7 32
valid_sources[0x33] 3305943 1 T2 413 T17 1 T7 33
valid_sources[0x34] 1598708 1 T2 403 T7 25 T33 1739
valid_sources[0x35] 1334934 1 T2 386 T7 16 T33 1747
valid_sources[0x36] 2247029 1 T2 388 T17 13 T7 30
valid_sources[0x37] 3691768 1 T1 1 T2 390 T7 30
valid_sources[0x38] 1872025 1 T1 1 T2 387 T17 4
valid_sources[0x39] 1448773 1 T1 1 T2 412 T7 32
valid_sources[0x3a] 1362541 1 T2 402 T7 25 T33 1657
valid_sources[0x3b] 1371388 1 T2 398 T17 1 T7 26
valid_sources[0x3c] 2206228 1 T2 412 T7 30 T33 1800
valid_sources[0x3d] 3322440 1 T2 376 T17 15 T7 27
valid_sources[0x3e] 3660226 1 T2 382 T7 18 T33 1597
valid_sources[0x3f] 3398179 1 T1 1 T2 392 T7 28
valid_sources[0x40] 2664047 1 T1 1 T2 413 T17 14
valid_sources[0x41] 1349574 1 T1 2 T2 405 T17 1
valid_sources[0x42] 2186428 1 T1 1 T2 386 T7 24
valid_sources[0x43] 1339507 1 T2 390 T7 31 T33 1795
valid_sources[0x44] 1347446 1 T2 400 T17 12 T7 28
valid_sources[0x45] 1333452 1 T2 398 T7 28 T33 1588
valid_sources[0x46] 3178143 1 T2 418 T7 37 T33 1751
valid_sources[0x47] 1346775 1 T2 422 T17 14 T7 28
valid_sources[0x48] 1340951 1 T1 1 T2 412 T7 30
valid_sources[0x49] 1335116 1 T2 410 T17 2 T7 28
valid_sources[0x4a] 2257795 1 T1 1 T2 394 T17 9
valid_sources[0x4b] 1342029 1 T2 388 T7 24 T33 1623
valid_sources[0x4c] 1336860 1 T2 411 T7 22 T33 1815
valid_sources[0x4d] 1342884 1 T1 1 T2 415 T7 29
valid_sources[0x4e] 1343166 1 T2 402 T7 30 T33 1723
valid_sources[0x4f] 1539474 1 T1 1 T2 402 T17 6
valid_sources[0x50] 1336898 1 T1 1 T2 383 T17 9
valid_sources[0x51] 1343771 1 T1 1 T2 424 T17 4
valid_sources[0x52] 1348209 1 T2 378 T17 2 T7 31
valid_sources[0x53] 1344818 1 T1 1 T2 398 T17 5
valid_sources[0x54] 1338910 1 T2 369 T17 36 T7 23
valid_sources[0x55] 1333167 1 T2 377 T17 7 T7 28
valid_sources[0x56] 1345592 1 T1 3 T2 411 T7 32
valid_sources[0x57] 1339988 1 T2 400 T7 37 T33 1759
valid_sources[0x58] 1494207 1 T1 4 T2 407 T7 35
valid_sources[0x59] 1334679 1 T1 3 T2 410 T17 5
valid_sources[0x5a] 1335565 1 T1 1 T2 405 T17 5
valid_sources[0x5b] 1348036 1 T1 1 T2 395 T7 18
valid_sources[0x5c] 1344952 1 T2 385 T7 23 T33 1785
valid_sources[0x5d] 1438098 1 T1 1 T2 396 T17 25
valid_sources[0x5e] 1348440 1 T1 1 T2 384 T17 4
valid_sources[0x5f] 1341254 1 T1 1 T2 366 T17 2
valid_sources[0x60] 1340873 1 T2 422 T17 21 T7 21
valid_sources[0x61] 1346030 1 T2 387 T7 34 T33 1661
valid_sources[0x62] 1342102 1 T2 456 T17 4 T7 35
valid_sources[0x63] 3902052 1 T1 1 T2 397 T7 29
valid_sources[0x64] 1352275 1 T2 403 T7 26 T33 1641
valid_sources[0x65] 1337170 1 T1 5 T2 413 T17 76
valid_sources[0x66] 1347786 1 T1 2 T2 344 T17 19
valid_sources[0x67] 1344791 1 T1 1 T2 391 T7 22
valid_sources[0x68] 1364061 1 T2 360 T7 24 T33 1769
valid_sources[0x69] 1483839 1 T2 381 T17 15 T7 23
valid_sources[0x6a] 1353296 1 T2 380 T7 25 T33 1666
valid_sources[0x6b] 1340337 1 T2 401 T7 20 T33 1741
valid_sources[0x6c] 1537085 1 T1 1 T2 360 T17 15
valid_sources[0x6d] 1333212 1 T2 397 T17 2 T7 25
valid_sources[0x6e] 2177606 1 T2 379 T7 34 T33 1700
valid_sources[0x6f] 1347607 1 T1 1 T2 414 T17 14
valid_sources[0x70] 1391964 1 T1 2 T2 425 T17 25
valid_sources[0x71] 1343548 1 T1 1 T2 383 T17 18
valid_sources[0x72] 1341946 1 T2 373 T7 27 T33 1850
valid_sources[0x73] 1345234 1 T2 365 T17 8 T7 29
valid_sources[0x74] 1350891 1 T2 398 T17 13 T7 33
valid_sources[0x75] 3080138 1 T1 2 T2 405 T7 28
valid_sources[0x76] 1332452 1 T2 382 T17 21 T7 34
valid_sources[0x77] 1341116 1 T1 2 T2 432 T7 29
valid_sources[0x78] 3683175 1 T1 1 T2 410 T7 32
valid_sources[0x79] 1376979 1 T2 427 T17 10 T7 18
valid_sources[0x7a] 1343208 1 T1 2 T2 380 T17 10
valid_sources[0x7b] 3304458 1 T1 2 T2 394 T17 10
valid_sources[0x7c] 3323706 1 T1 1 T2 406 T7 31
valid_sources[0x7d] 3724318 1 T1 1 T2 393 T17 4
valid_sources[0x7e] 1339476 1 T1 1 T2 390 T17 12
valid_sources[0x7f] 1347200 1 T2 384 T17 10 T7 25
valid_sources[0x80] 1345855 1 T1 1 T2 432 T7 36



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 72421486 1 T1 25 T2 42549 T3 110836
values[0x0] all_enables biggest_size 61526969 1 T1 38 T2 9737 T3 117070
values[0x1] all_enables biggest_size 52989942 1 T1 37 T2 8563 T3 99035

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%