Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
184703 |
1 |
|
|
T7 |
660 |
|
T8 |
185 |
|
T9 |
397 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
104379 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
55443 |
1 |
|
|
T7 |
15 |
|
T8 |
180 |
|
T9 |
392 |
seven_bytes |
3598 |
1 |
|
|
T7 |
16 |
|
T19 |
50 |
|
T20 |
16 |
six_bytes |
3533 |
1 |
|
|
T7 |
15 |
|
T19 |
40 |
|
T20 |
14 |
five_bytes |
3580 |
1 |
|
|
T7 |
14 |
|
T19 |
43 |
|
T20 |
20 |
four_bytes |
3497 |
1 |
|
|
T7 |
21 |
|
T19 |
45 |
|
T20 |
15 |
three_bytes |
3598 |
1 |
|
|
T7 |
22 |
|
T19 |
52 |
|
T20 |
12 |
two_bytes |
3569 |
1 |
|
|
T7 |
14 |
|
T19 |
39 |
|
T20 |
14 |
one_byte |
3506 |
1 |
|
|
T7 |
21 |
|
T19 |
46 |
|
T20 |
16 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
181420 |
1 |
|
|
T7 |
654 |
|
T8 |
175 |
|
T9 |
387 |
auto[1] |
3283 |
1 |
|
|
T7 |
6 |
|
T8 |
10 |
|
T9 |
10 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
184703 |
1 |
|
|
T7 |
660 |
|
T8 |
185 |
|
T9 |
397 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
184688 |
1 |
|
|
T7 |
660 |
|
T8 |
185 |
|
T9 |
397 |
auto[1] |
15 |
1 |
|
|
T70 |
1 |
|
T186 |
1 |
|
T18 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1103 |
1 |
|
|
T8 |
5 |
|
T9 |
5 |
|
T48 |
10 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3283 |
1 |
|
|
T7 |
6 |
|
T8 |
10 |
|
T9 |
10 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168879 |
1 |
|
|
T7 |
101 |
|
T8 |
370 |
|
T9 |
515 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
91015 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
55817 |
1 |
|
|
T7 |
6 |
|
T8 |
364 |
|
T9 |
506 |
seven_bytes |
3117 |
1 |
|
|
T7 |
2 |
|
T19 |
17 |
|
T16 |
12 |
six_bytes |
3146 |
1 |
|
|
T7 |
1 |
|
T19 |
24 |
|
T16 |
22 |
five_bytes |
3201 |
1 |
|
|
T7 |
2 |
|
T19 |
19 |
|
T16 |
15 |
four_bytes |
3148 |
1 |
|
|
T7 |
1 |
|
T19 |
17 |
|
T16 |
20 |
three_bytes |
3240 |
1 |
|
|
T7 |
5 |
|
T19 |
21 |
|
T16 |
21 |
two_bytes |
3072 |
1 |
|
|
T7 |
2 |
|
T19 |
18 |
|
T16 |
16 |
one_byte |
3123 |
1 |
|
|
T7 |
3 |
|
T19 |
24 |
|
T16 |
15 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165675 |
1 |
|
|
T7 |
99 |
|
T8 |
358 |
|
T9 |
497 |
auto[1] |
3204 |
1 |
|
|
T7 |
2 |
|
T8 |
12 |
|
T9 |
18 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168879 |
1 |
|
|
T7 |
101 |
|
T8 |
370 |
|
T9 |
515 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
168869 |
1 |
|
|
T7 |
101 |
|
T8 |
370 |
|
T9 |
515 |
auto[1] |
10 |
1 |
|
|
T83 |
1 |
|
T187 |
1 |
|
T65 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1082 |
1 |
|
|
T8 |
6 |
|
T9 |
9 |
|
T48 |
10 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3204 |
1 |
|
|
T7 |
2 |
|
T8 |
12 |
|
T9 |
18 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
337419 |
1 |
|
|
T7 |
716 |
|
T8 |
782 |
|
T9 |
1350 |
auto[1] |
494 |
1 |
|
|
T10 |
87 |
|
T11 |
78 |
|
T12 |
59 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
182974 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
111754 |
1 |
|
|
T7 |
19 |
|
T8 |
768 |
|
T9 |
1330 |
seven_bytes |
6267 |
1 |
|
|
T7 |
17 |
|
T19 |
48 |
|
T20 |
39 |
six_bytes |
6243 |
1 |
|
|
T7 |
18 |
|
T19 |
33 |
|
T20 |
28 |
five_bytes |
6110 |
1 |
|
|
T7 |
18 |
|
T19 |
42 |
|
T20 |
32 |
four_bytes |
6097 |
1 |
|
|
T7 |
16 |
|
T19 |
37 |
|
T20 |
38 |
three_bytes |
6215 |
1 |
|
|
T7 |
14 |
|
T19 |
43 |
|
T20 |
34 |
two_bytes |
6081 |
1 |
|
|
T7 |
17 |
|
T19 |
37 |
|
T20 |
27 |
one_byte |
6172 |
1 |
|
|
T7 |
22 |
|
T19 |
36 |
|
T20 |
23 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
331514 |
1 |
|
|
T7 |
708 |
|
T8 |
754 |
|
T9 |
1310 |
auto[1] |
6399 |
1 |
|
|
T7 |
8 |
|
T8 |
28 |
|
T9 |
40 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
337913 |
1 |
|
|
T7 |
716 |
|
T8 |
782 |
|
T9 |
1350 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
337886 |
1 |
|
|
T7 |
716 |
|
T8 |
782 |
|
T9 |
1350 |
auto[1] |
27 |
1 |
|
|
T83 |
1 |
|
T10 |
1 |
|
T186 |
2 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2128 |
1 |
|
|
T8 |
14 |
|
T9 |
20 |
|
T48 |
19 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6399 |
1 |
|
|
T7 |
8 |
|
T8 |
28 |
|
T9 |
40 |