Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
172532 |
1 |
|
|
T8 |
159 |
|
T9 |
1524 |
|
T18 |
1382 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
84814 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
67314 |
1 |
|
|
T8 |
157 |
|
T9 |
156 |
|
T18 |
20 |
seven_bytes |
2925 |
1 |
|
|
T9 |
37 |
|
T18 |
47 |
|
T45 |
20 |
six_bytes |
2949 |
1 |
|
|
T9 |
43 |
|
T18 |
44 |
|
T45 |
18 |
five_bytes |
2956 |
1 |
|
|
T9 |
37 |
|
T18 |
45 |
|
T45 |
20 |
four_bytes |
2910 |
1 |
|
|
T9 |
34 |
|
T18 |
32 |
|
T45 |
15 |
three_bytes |
2859 |
1 |
|
|
T9 |
35 |
|
T18 |
32 |
|
T45 |
17 |
two_bytes |
2891 |
1 |
|
|
T9 |
36 |
|
T18 |
38 |
|
T45 |
15 |
one_byte |
2914 |
1 |
|
|
T9 |
44 |
|
T18 |
31 |
|
T45 |
21 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
169142 |
1 |
|
|
T8 |
155 |
|
T9 |
1508 |
|
T18 |
1358 |
auto[1] |
3390 |
1 |
|
|
T8 |
4 |
|
T9 |
16 |
|
T18 |
24 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
172532 |
1 |
|
|
T8 |
159 |
|
T9 |
1524 |
|
T18 |
1382 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
172526 |
1 |
|
|
T8 |
159 |
|
T9 |
1524 |
|
T18 |
1382 |
auto[1] |
6 |
1 |
|
|
T12 |
1 |
|
T165 |
1 |
|
T166 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1218 |
1 |
|
|
T8 |
2 |
|
T9 |
3 |
|
T18 |
5 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3390 |
1 |
|
|
T8 |
4 |
|
T9 |
16 |
|
T18 |
24 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165830 |
1 |
|
|
T7 |
145 |
|
T8 |
103 |
|
T9 |
1242 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
81756 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
64727 |
1 |
|
|
T7 |
2 |
|
T8 |
101 |
|
T9 |
71 |
seven_bytes |
2735 |
1 |
|
|
T7 |
4 |
|
T9 |
44 |
|
T18 |
30 |
six_bytes |
2793 |
1 |
|
|
T7 |
5 |
|
T9 |
28 |
|
T18 |
31 |
five_bytes |
2769 |
1 |
|
|
T7 |
2 |
|
T9 |
37 |
|
T18 |
33 |
four_bytes |
2669 |
1 |
|
|
T7 |
1 |
|
T9 |
33 |
|
T18 |
34 |
three_bytes |
2838 |
1 |
|
|
T7 |
4 |
|
T9 |
20 |
|
T18 |
35 |
two_bytes |
2764 |
1 |
|
|
T7 |
2 |
|
T9 |
27 |
|
T18 |
34 |
one_byte |
2779 |
1 |
|
|
T7 |
3 |
|
T9 |
27 |
|
T18 |
30 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
162526 |
1 |
|
|
T7 |
143 |
|
T8 |
99 |
|
T9 |
1228 |
auto[1] |
3304 |
1 |
|
|
T7 |
2 |
|
T8 |
4 |
|
T9 |
14 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165830 |
1 |
|
|
T7 |
145 |
|
T8 |
103 |
|
T9 |
1242 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
165815 |
1 |
|
|
T7 |
145 |
|
T8 |
103 |
|
T9 |
1242 |
auto[1] |
15 |
1 |
|
|
T167 |
1 |
|
T168 |
1 |
|
T68 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1197 |
1 |
|
|
T8 |
2 |
|
T9 |
5 |
|
T18 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3304 |
1 |
|
|
T7 |
2 |
|
T8 |
4 |
|
T9 |
14 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
335293 |
1 |
|
|
T7 |
92 |
|
T8 |
310 |
|
T9 |
1090 |
auto[1] |
656 |
1 |
|
|
T10 |
79 |
|
T11 |
87 |
|
T12 |
59 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
168297 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
127503 |
1 |
|
|
T7 |
2 |
|
T8 |
303 |
|
T9 |
302 |
seven_bytes |
5682 |
1 |
|
|
T7 |
1 |
|
T9 |
24 |
|
T18 |
67 |
six_bytes |
5790 |
1 |
|
|
T7 |
1 |
|
T9 |
16 |
|
T18 |
66 |
five_bytes |
5748 |
1 |
|
|
T7 |
3 |
|
T9 |
26 |
|
T18 |
84 |
four_bytes |
5669 |
1 |
|
|
T7 |
5 |
|
T9 |
16 |
|
T18 |
88 |
three_bytes |
5726 |
1 |
|
|
T7 |
2 |
|
T9 |
21 |
|
T18 |
76 |
two_bytes |
5800 |
1 |
|
|
T7 |
1 |
|
T9 |
21 |
|
T18 |
82 |
one_byte |
5734 |
1 |
|
|
T7 |
4 |
|
T9 |
23 |
|
T18 |
81 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
329286 |
1 |
|
|
T7 |
90 |
|
T8 |
296 |
|
T9 |
1070 |
auto[1] |
6663 |
1 |
|
|
T7 |
2 |
|
T8 |
14 |
|
T9 |
20 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
335949 |
1 |
|
|
T7 |
92 |
|
T8 |
310 |
|
T9 |
1090 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
335930 |
1 |
|
|
T7 |
92 |
|
T8 |
310 |
|
T9 |
1090 |
auto[1] |
19 |
1 |
|
|
T74 |
1 |
|
T169 |
1 |
|
T168 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2380 |
1 |
|
|
T8 |
7 |
|
T9 |
7 |
|
T18 |
8 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6663 |
1 |
|
|
T7 |
2 |
|
T8 |
14 |
|
T9 |
20 |