Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
157217 |
1 |
|
|
T7 |
307 |
|
T8 |
406 |
|
T21 |
395 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
82749 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
54657 |
1 |
|
|
T7 |
300 |
|
T8 |
10 |
|
T21 |
391 |
seven_bytes |
2851 |
1 |
|
|
T8 |
9 |
|
T80 |
6 |
|
T16 |
79 |
six_bytes |
2798 |
1 |
|
|
T8 |
9 |
|
T80 |
11 |
|
T16 |
99 |
five_bytes |
2877 |
1 |
|
|
T8 |
9 |
|
T80 |
8 |
|
T16 |
107 |
four_bytes |
2827 |
1 |
|
|
T8 |
8 |
|
T80 |
8 |
|
T16 |
95 |
three_bytes |
2927 |
1 |
|
|
T8 |
13 |
|
T80 |
8 |
|
T16 |
95 |
two_bytes |
2776 |
1 |
|
|
T8 |
10 |
|
T80 |
6 |
|
T16 |
104 |
one_byte |
2755 |
1 |
|
|
T8 |
10 |
|
T80 |
8 |
|
T16 |
96 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
154297 |
1 |
|
|
T7 |
293 |
|
T8 |
400 |
|
T21 |
387 |
auto[1] |
2920 |
1 |
|
|
T7 |
14 |
|
T8 |
6 |
|
T21 |
8 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
157217 |
1 |
|
|
T7 |
307 |
|
T8 |
406 |
|
T21 |
395 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
157206 |
1 |
|
|
T7 |
307 |
|
T8 |
406 |
|
T21 |
395 |
auto[1] |
11 |
1 |
|
|
T11 |
1 |
|
T130 |
1 |
|
T205 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1006 |
1 |
|
|
T7 |
7 |
|
T8 |
1 |
|
T21 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2920 |
1 |
|
|
T7 |
14 |
|
T8 |
6 |
|
T21 |
8 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
166775 |
1 |
|
|
T7 |
607 |
|
T8 |
1030 |
|
T9 |
45 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
89736 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
55582 |
1 |
|
|
T7 |
601 |
|
T8 |
20 |
|
T9 |
44 |
seven_bytes |
3131 |
1 |
|
|
T8 |
39 |
|
T16 |
133 |
|
T22 |
63 |
six_bytes |
3109 |
1 |
|
|
T8 |
24 |
|
T16 |
106 |
|
T22 |
71 |
five_bytes |
3042 |
1 |
|
|
T8 |
34 |
|
T16 |
117 |
|
T22 |
59 |
four_bytes |
3040 |
1 |
|
|
T8 |
24 |
|
T16 |
104 |
|
T22 |
47 |
three_bytes |
2949 |
1 |
|
|
T8 |
33 |
|
T16 |
105 |
|
T22 |
53 |
two_bytes |
3039 |
1 |
|
|
T8 |
27 |
|
T16 |
106 |
|
T22 |
43 |
one_byte |
3147 |
1 |
|
|
T8 |
30 |
|
T16 |
112 |
|
T22 |
54 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
163713 |
1 |
|
|
T7 |
595 |
|
T8 |
1018 |
|
T9 |
43 |
auto[1] |
3062 |
1 |
|
|
T7 |
12 |
|
T8 |
12 |
|
T9 |
2 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
166775 |
1 |
|
|
T7 |
607 |
|
T8 |
1030 |
|
T9 |
45 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
166762 |
1 |
|
|
T7 |
607 |
|
T8 |
1030 |
|
T9 |
45 |
auto[1] |
13 |
1 |
|
|
T130 |
1 |
|
T206 |
1 |
|
T207 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1023 |
1 |
|
|
T7 |
6 |
|
T8 |
2 |
|
T9 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3062 |
1 |
|
|
T7 |
12 |
|
T8 |
12 |
|
T9 |
2 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
320169 |
1 |
|
|
T7 |
1252 |
|
T8 |
2067 |
|
T21 |
121 |
auto[1] |
505 |
1 |
|
|
T10 |
81 |
|
T11 |
57 |
|
T12 |
22 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
171903 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
107697 |
1 |
|
|
T7 |
1234 |
|
T8 |
41 |
|
T21 |
119 |
seven_bytes |
6112 |
1 |
|
|
T8 |
57 |
|
T16 |
157 |
|
T22 |
103 |
six_bytes |
5781 |
1 |
|
|
T8 |
41 |
|
T16 |
159 |
|
T22 |
79 |
five_bytes |
5886 |
1 |
|
|
T8 |
71 |
|
T16 |
146 |
|
T22 |
84 |
four_bytes |
5911 |
1 |
|
|
T8 |
66 |
|
T16 |
156 |
|
T22 |
94 |
three_bytes |
5780 |
1 |
|
|
T8 |
48 |
|
T16 |
137 |
|
T22 |
85 |
two_bytes |
5744 |
1 |
|
|
T8 |
55 |
|
T16 |
146 |
|
T22 |
85 |
one_byte |
5860 |
1 |
|
|
T8 |
61 |
|
T16 |
139 |
|
T22 |
85 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
314710 |
1 |
|
|
T7 |
1216 |
|
T8 |
2041 |
|
T21 |
117 |
auto[1] |
5964 |
1 |
|
|
T7 |
36 |
|
T8 |
26 |
|
T21 |
4 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
320674 |
1 |
|
|
T7 |
1252 |
|
T8 |
2067 |
|
T21 |
121 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
320650 |
1 |
|
|
T7 |
1252 |
|
T8 |
2066 |
|
T21 |
121 |
auto[1] |
24 |
1 |
|
|
T8 |
1 |
|
T10 |
3 |
|
T17 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2009 |
1 |
|
|
T7 |
18 |
|
T8 |
6 |
|
T21 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
5964 |
1 |
|
|
T7 |
36 |
|
T8 |
26 |
|
T21 |
4 |