Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	258264075	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

181487288

1

T1

927719

T2

342786

T3

1111

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	228306818	1			T1	119357		T2	448057		T3	829
values[0x0]	101617845	1			T1	561798		T2	214343		T3	504
values[0x1]	109826700	1			T1	611489		T2	231637		T3	555

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	200821559	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

238929804

1

T1

124757

T2

463632

T3

1294

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1916319	1			T1	9058		T2	3531		T23	249
valid_sources[0x01]	1343004	1			T1	8923		T2	3646		T23	277
valid_sources[0x02]	1997599	1			T1	9201		T2	3331		T23	268
valid_sources[0x03]	1340563	1			T1	9781		T2	3408		T23	271
valid_sources[0x04]	1349520	1			T1	9529		T2	3586		T23	266
valid_sources[0x05]	1364785	1			T1	9132		T2	3380		T23	221
valid_sources[0x06]	1345092	1			T1	9883		T2	3488		T23	236
valid_sources[0x07]	1343459	1			T1	9473		T2	3396		T23	290
valid_sources[0x08]	1335225	1			T1	9043		T2	3457		T23	266
valid_sources[0x09]	1789893	1			T1	8704		T2	3592		T23	242
valid_sources[0x0a]	1338242	1			T1	9328		T2	3466		T23	284
valid_sources[0x0b]	1468472	1			T1	9436		T2	3407		T23	208
valid_sources[0x0c]	1332421	1			T1	8873		T2	3704		T23	299
valid_sources[0x0d]	1343407	1			T1	9463		T2	3457		T23	253
valid_sources[0x0e]	3346414	1			T1	9526		T2	3409		T23	275
valid_sources[0x0f]	1334304	1			T1	9335		T2	3495		T23	295
valid_sources[0x10]	1439201	1			T1	8993		T2	3570		T23	246
valid_sources[0x11]	1340828	1			T1	9284		T2	3723		T23	259
valid_sources[0x12]	1344654	1			T1	9263		T2	3380		T23	330
valid_sources[0x13]	1343802	1			T1	9535		T2	3501		T23	224
valid_sources[0x14]	1347467	1			T1	9544		T2	3385		T23	325
valid_sources[0x15]	1336145	1			T1	9107		T2	3593		T23	332
valid_sources[0x16]	2220143	1			T1	9643		T2	3473		T23	300
valid_sources[0x17]	4766100	1			T1	9038		T2	3734		T23	312
valid_sources[0x18]	1789721	1			T1	9079		T2	3305		T23	289
valid_sources[0x19]	1344589	1			T1	9748		T2	3551		T23	269
valid_sources[0x1a]	1335060	1			T1	8609		T2	3366		T23	275
valid_sources[0x1b]	1339716	1			T1	8979		T2	3592		T23	275
valid_sources[0x1c]	1368812	1			T1	9106		T2	3318		T23	255
valid_sources[0x1d]	1996431	1			T1	9182		T2	3360		T23	273
valid_sources[0x1e]	1359197	1			T1	9707		T2	3598		T23	243
valid_sources[0x1f]	3281686	1			T1	9308		T2	3596		T23	265
valid_sources[0x20]	1337962	1			T1	9199		T2	3477		T23	243
valid_sources[0x21]	1332914	1			T1	8653		T2	3751		T23	313
valid_sources[0x22]	1517533	1			T1	9628		T2	3532		T23	272
valid_sources[0x23]	1338497	1			T1	8942		T2	3480		T23	278
valid_sources[0x24]	1400802	1			T1	9043		T2	3600		T23	339
valid_sources[0x25]	1634642	1			T1	8907		T2	3577		T23	290
valid_sources[0x26]	1344215	1			T1	9437		T2	3553		T23	263
valid_sources[0x27]	1339058	1			T1	9088		T2	3297		T23	265
valid_sources[0x28]	1343866	1			T1	9685		T2	3614		T23	268
valid_sources[0x29]	2126731	1			T1	8897		T2	3468		T23	253
valid_sources[0x2a]	2246806	1			T1	9286		T2	3503		T23	291
valid_sources[0x2b]	1337401	1			T1	9242		T2	3578		T23	232
valid_sources[0x2c]	1335883	1			T1	9190		T2	3285		T23	286
valid_sources[0x2d]	1345109	1			T1	9669		T2	3499		T23	255
valid_sources[0x2e]	1338608	1			T1	9203		T2	3229		T23	262
valid_sources[0x2f]	1334124	1			T1	9125		T2	3390		T23	239
valid_sources[0x30]	3352094	1			T1	9154		T2	3516		T23	287
valid_sources[0x31]	2390717	1			T1	10071		T2	3511		T23	260
valid_sources[0x32]	1335798	1			T1	8787		T2	3479		T23	231
valid_sources[0x33]	1695233	1			T1	9894		T2	3367		T23	302
valid_sources[0x34]	1347397	1			T1	9370		T2	3560		T23	317
valid_sources[0x35]	3982821	1			T1	9623		T2	3616		T23	317
valid_sources[0x36]	1980318	1			T1	8878		T2	3389		T23	269
valid_sources[0x37]	3092741	1			T1	9083		T2	3545		T23	274
valid_sources[0x38]	1461078	1			T1	9074		T2	3585		T23	249
valid_sources[0x39]	3146846	1			T1	9310		T2	3595		T23	265
valid_sources[0x3a]	3687014	1			T1	9384		T2	3561		T23	261
valid_sources[0x3b]	1347744	1			T1	9378		T2	3658		T23	231
valid_sources[0x3c]	1341246	1			T1	8846		T2	3544		T23	266
valid_sources[0x3d]	1346516	1			T1	9749		T2	3588		T23	271
valid_sources[0x3e]	1334947	1			T1	9484		T2	3340		T23	291
valid_sources[0x3f]	2033002	1			T1	9783		T2	3484		T23	295
valid_sources[0x40]	1334562	1			T1	8807		T2	3488		T23	228
valid_sources[0x41]	1338658	1			T1	9028		T2	3448		T23	299
valid_sources[0x42]	1342345	1			T1	9277		T2	3670		T23	233
valid_sources[0x43]	1338196	1			T1	9396		T2	3495		T23	295
valid_sources[0x44]	1335658	1			T1	9021		T2	3520		T23	279
valid_sources[0x45]	2639593	1			T1	8790		T2	3390		T23	246
valid_sources[0x46]	1989690	1			T1	9565		T2	3571		T23	306
valid_sources[0x47]	1334450	1			T1	9224		T2	3261		T23	294
valid_sources[0x48]	1339214	1			T1	8696		T2	3505		T23	283
valid_sources[0x49]	2482828	1			T1	9192		T2	3422		T23	250
valid_sources[0x4a]	1341002	1			T1	9165		T2	3460		T23	289
valid_sources[0x4b]	2255614	1			T1	9094		T2	3238		T23	225
valid_sources[0x4c]	1346328	1			T1	9058		T2	3571		T23	281
valid_sources[0x4d]	1347240	1			T1	9621		T2	3466		T23	306
valid_sources[0x4e]	1337752	1			T1	8878		T2	3340		T23	283
valid_sources[0x4f]	1972492	1			T1	9057		T2	3341		T23	273
valid_sources[0x50]	1334134	1			T1	9556		T2	3653		T23	254
valid_sources[0x51]	1649077	1			T1	9023		T2	3407		T23	293
valid_sources[0x52]	3646988	1			T1	8939		T2	3179		T23	262
valid_sources[0x53]	1481567	1			T1	8794		T2	3604		T23	262
valid_sources[0x54]	4377245	1			T1	9631		T2	3308		T23	254
valid_sources[0x55]	1344222	1			T1	9221		T2	3568		T23	281
valid_sources[0x56]	1340394	1			T1	8697		T2	3270		T23	320
valid_sources[0x57]	1339596	1			T1	8835		T2	3414		T23	267
valid_sources[0x58]	1341715	1			T1	9493		T2	3714		T23	311
valid_sources[0x59]	1834957	1			T1	9505		T2	3455		T23	254
valid_sources[0x5a]	1545668	1			T1	9415		T2	3431		T23	296
valid_sources[0x5b]	3891436	1			T1	9139		T2	3497		T23	319
valid_sources[0x5c]	2171019	1			T1	9157		T2	3421		T23	305
valid_sources[0x5d]	1341042	1			T1	9608		T2	3497		T23	258
valid_sources[0x5e]	1345006	1			T1	9123		T2	3536		T23	292
valid_sources[0x5f]	1336217	1			T1	9688		T2	3567		T23	240
valid_sources[0x60]	1342716	1			T1	9063		T2	3619		T23	272
valid_sources[0x61]	1341243	1			T1	9419		T2	3418		T23	268
valid_sources[0x62]	2376791	1			T1	9589		T2	3741		T23	271
valid_sources[0x63]	2111069	1			T1	9555		T2	3549		T23	292
valid_sources[0x64]	1339831	1			T1	9541		T2	3453		T23	315
valid_sources[0x65]	1337420	1			T1	8783		T2	3331		T23	294
valid_sources[0x66]	1789770	1			T1	9358		T2	3683		T23	288
valid_sources[0x67]	3672428	1			T1	8656		T2	3398		T23	345
valid_sources[0x68]	1340399	1			T1	8518		T2	3505		T23	257
valid_sources[0x69]	1342808	1			T1	8638		T2	3415		T23	305
valid_sources[0x6a]	1437190	1			T1	9796		T2	3359		T23	239
valid_sources[0x6b]	1332672	1			T1	9780		T2	3530		T23	287
valid_sources[0x6c]	1350617	1			T1	9198		T2	3585		T23	264
valid_sources[0x6d]	1341912	1			T1	9246		T2	3660		T23	285
valid_sources[0x6e]	1335686	1			T1	9458		T2	3537		T23	223
valid_sources[0x6f]	1340338	1			T1	8734		T2	3497		T23	291
valid_sources[0x70]	3698865	1			T1	9033		T2	3405		T23	262
valid_sources[0x71]	1338451	1			T1	9349		T2	3554		T23	245
valid_sources[0x72]	3309522	1			T1	9339		T2	3622		T23	232
valid_sources[0x73]	1330720	1			T1	9275		T2	3543		T23	234
valid_sources[0x74]	1572926	1			T1	9870		T2	3388		T23	272
valid_sources[0x75]	1342093	1			T1	9144		T2	3513		T23	279
valid_sources[0x76]	3304384	1			T1	9139		T2	3576		T23	307
valid_sources[0x77]	2214716	1			T1	9098		T2	3650		T23	254
valid_sources[0x78]	1339213	1			T1	9120		T2	3345		T23	266
valid_sources[0x79]	1352470	1			T1	9252		T2	3475		T23	303
valid_sources[0x7a]	1479243	1			T1	9455		T2	3583		T23	296
valid_sources[0x7b]	2193389	1			T1	9706		T2	3531		T23	297
valid_sources[0x7c]	2245847	1			T1	9543		T2	3337		T23	320
valid_sources[0x7d]	1338502	1			T1	9434		T2	3438		T23	299
valid_sources[0x7e]	1341759	1			T1	8996		T2	3589		T23	253
valid_sources[0x7f]	1341264	1			T1	9457		T2	3577		T23	256
valid_sources[0x80]	2260369	1			T1	9094		T2	3681		T23	233

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

70537867

1

T1

339573

T2

116609

T3

343

values[0x0]

all_enables

biggest_size

59683872

1

T1

318587

T2

122438

T3

385

values[0x1]

all_enables

biggest_size

51265549

1

T1

269559

T2

103739

T3

383