Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	258282838	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

184257091

1

T1

78585

T2

268319

T3

1068

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	229640767	1			T1	90640		T2	363138		T3	717
values[0x0]	102359243	1			T1	36609		T2	149245		T3	489
values[0x1]	110539919	1			T1	37760		T2	163235		T3	492

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	200741580	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

241798349

1

T1

96903

T2

360942

T3

1223

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1456119	1			T1	632		T2	2644		T3	4
valid_sources[0x01]	1272041	1			T1	609		T2	2608		T3	8
valid_sources[0x02]	1277126	1			T1	625		T2	2667		T3	2
valid_sources[0x03]	6708510	1			T1	622		T2	2590		T3	11
valid_sources[0x04]	1276264	1			T1	659		T2	2555		T3	3
valid_sources[0x05]	1280565	1			T1	679		T2	2607		T32	1069
valid_sources[0x06]	1279394	1			T1	626		T2	2569		T3	7
valid_sources[0x07]	1277151	1			T1	667		T2	2706		T3	6
valid_sources[0x08]	1280699	1			T1	725		T2	2764		T3	2
valid_sources[0x09]	1283658	1			T1	719		T2	2726		T3	21
valid_sources[0x0a]	2341251	1			T1	671		T2	2528		T3	2
valid_sources[0x0b]	1281295	1			T1	639		T2	2773		T3	3
valid_sources[0x0c]	1617823	1			T1	656		T2	2553		T3	10
valid_sources[0x0d]	1374529	1			T1	650		T2	2684		T3	15
valid_sources[0x0e]	1419786	1			T1	615		T2	2692		T3	9
valid_sources[0x0f]	1270054	1			T1	586		T2	2608		T3	1
valid_sources[0x10]	2114752	1			T1	622		T2	2589		T32	996
valid_sources[0x11]	1273743	1			T1	649		T2	2766		T32	1134
valid_sources[0x12]	1278069	1			T1	680		T2	2626		T3	25
valid_sources[0x13]	5231263	1			T1	602		T2	2704		T32	1061
valid_sources[0x14]	1282552	1			T1	631		T2	2605		T3	12
valid_sources[0x15]	1276930	1			T1	640		T2	2503		T3	2
valid_sources[0x16]	2197406	1			T1	642		T2	2530		T3	3
valid_sources[0x17]	1312735	1			T1	657		T2	2682		T3	11
valid_sources[0x18]	1273513	1			T1	631		T2	2574		T3	11
valid_sources[0x19]	1306511	1			T1	654		T2	2783		T3	18
valid_sources[0x1a]	1276161	1			T1	660		T2	2662		T3	13
valid_sources[0x1b]	1280951	1			T1	638		T2	2791		T32	964
valid_sources[0x1c]	2209183	1			T1	647		T2	2593		T32	1287
valid_sources[0x1d]	1275024	1			T1	656		T2	2625		T3	6
valid_sources[0x1e]	1379179	1			T1	627		T2	2808		T3	11
valid_sources[0x1f]	1278026	1			T1	637		T2	2555		T3	6
valid_sources[0x20]	1271968	1			T1	697		T2	2587		T3	6
valid_sources[0x21]	1276125	1			T1	630		T2	2488		T3	8
valid_sources[0x22]	2153920	1			T1	652		T2	2518		T3	5
valid_sources[0x23]	1658944	1			T1	644		T2	2620		T3	2
valid_sources[0x24]	1279434	1			T1	667		T2	2703		T3	1
valid_sources[0x25]	1279823	1			T1	619		T2	2522		T3	5
valid_sources[0x26]	1307571	1			T1	648		T2	2659		T3	6
valid_sources[0x27]	1339298	1			T1	636		T2	2593		T32	1079
valid_sources[0x28]	1281100	1			T1	621		T2	2671		T32	1196
valid_sources[0x29]	1953389	1			T1	666		T2	2537		T32	1191
valid_sources[0x2a]	1277630	1			T1	650		T2	2694		T3	5
valid_sources[0x2b]	1295134	1			T1	626		T2	2864		T3	16
valid_sources[0x2c]	1294137	1			T1	723		T2	2670		T32	1101
valid_sources[0x2d]	1468024	1			T1	652		T2	2553		T3	11
valid_sources[0x2e]	1273530	1			T1	641		T2	2635		T3	5
valid_sources[0x2f]	1404772	1			T1	619		T2	2753		T3	9
valid_sources[0x30]	1295063	1			T1	627		T2	2614		T32	1043
valid_sources[0x31]	1281522	1			T1	658		T2	2497		T32	1153
valid_sources[0x32]	1280208	1			T1	681		T2	2723		T3	18
valid_sources[0x33]	1282586	1			T1	601		T2	2672		T32	1248
valid_sources[0x34]	1275217	1			T1	677		T2	2634		T3	8
valid_sources[0x35]	3783822	1			T1	680		T2	2625		T3	11
valid_sources[0x36]	1275278	1			T1	694		T2	2593		T3	12
valid_sources[0x37]	1273324	1			T1	627		T2	2431		T3	1
valid_sources[0x38]	1279457	1			T1	624		T2	2561		T3	17
valid_sources[0x39]	1732701	1			T1	613		T2	2702		T32	1073
valid_sources[0x3a]	2195663	1			T1	658		T2	2743		T3	3
valid_sources[0x3b]	2356490	1			T1	630		T2	2673		T3	3
valid_sources[0x3c]	2240645	1			T1	602		T2	2489		T3	8
valid_sources[0x3d]	3309277	1			T1	650		T2	2845		T32	1112
valid_sources[0x3e]	1282361	1			T1	619		T2	2510		T3	8
valid_sources[0x3f]	1278187	1			T1	614		T2	2941		T32	871
valid_sources[0x40]	1273703	1			T1	671		T2	2573		T32	1212
valid_sources[0x41]	4532883	1			T1	667		T2	2719		T3	6
valid_sources[0x42]	1270901	1			T1	648		T2	2577		T3	5
valid_sources[0x43]	1282409	1			T1	627		T2	2558		T3	6
valid_sources[0x44]	1366544	1			T1	680		T2	2591		T3	3
valid_sources[0x45]	1280454	1			T1	610		T2	2628		T3	2
valid_sources[0x46]	1277623	1			T1	612		T2	2808		T3	25
valid_sources[0x47]	1732593	1			T1	652		T2	2545		T3	3
valid_sources[0x48]	1273129	1			T1	650		T2	2847		T3	14
valid_sources[0x49]	2270774	1			T1	633		T2	2569		T3	15
valid_sources[0x4a]	1281314	1			T1	695		T2	2620		T3	6
valid_sources[0x4b]	3337664	1			T1	598		T2	2627		T3	16
valid_sources[0x4c]	1279545	1			T1	629		T2	2696		T3	1
valid_sources[0x4d]	1301562	1			T1	673		T2	2705		T3	2
valid_sources[0x4e]	1450921	1			T1	654		T2	2696		T3	9
valid_sources[0x4f]	2494126	1			T1	656		T2	2659		T3	6
valid_sources[0x50]	3257256	1			T1	692		T2	2675		T3	1
valid_sources[0x51]	2132677	1			T1	673		T2	2651		T32	1100
valid_sources[0x52]	3663387	1			T1	630		T2	2576		T32	1324
valid_sources[0x53]	3573147	1			T1	671		T2	2771		T3	19
valid_sources[0x54]	3264096	1			T1	678		T2	2768		T3	5
valid_sources[0x55]	1278147	1			T1	612		T2	2463		T3	8
valid_sources[0x56]	1390154	1			T1	669		T2	2570		T3	3
valid_sources[0x57]	1281942	1			T1	631		T2	2699		T3	10
valid_sources[0x58]	1277013	1			T1	611		T2	2602		T3	28
valid_sources[0x59]	3684227	1			T1	589		T2	2576		T32	1001
valid_sources[0x5a]	1277838	1			T1	662		T2	2732		T3	4
valid_sources[0x5b]	1285225	1			T1	668		T2	2717		T3	13
valid_sources[0x5c]	1350402	1			T1	725		T2	2819		T32	1166
valid_sources[0x5d]	1278667	1			T1	686		T2	2623		T3	8
valid_sources[0x5e]	1305566	1			T1	592		T2	2706		T32	1176
valid_sources[0x5f]	1814974	1			T1	670		T2	2654		T32	1101
valid_sources[0x60]	1275520	1			T1	612		T2	2830		T3	16
valid_sources[0x61]	1724497	1			T1	652		T2	2592		T3	1
valid_sources[0x62]	3587418	1			T1	679		T2	2446		T3	3
valid_sources[0x63]	1278506	1			T1	647		T2	2642		T3	25
valid_sources[0x64]	1280504	1			T1	652		T2	2810		T3	11
valid_sources[0x65]	1276627	1			T1	650		T2	2511		T32	1158
valid_sources[0x66]	1282509	1			T1	629		T2	2625		T3	6
valid_sources[0x67]	2172391	1			T1	634		T2	2767		T3	13
valid_sources[0x68]	2055145	1			T1	700		T2	2761		T32	1315
valid_sources[0x69]	1292689	1			T1	702		T2	2602		T3	30
valid_sources[0x6a]	1401270	1			T1	632		T2	2512		T32	1241
valid_sources[0x6b]	1275308	1			T1	618		T2	2670		T3	1
valid_sources[0x6c]	1349893	1			T1	646		T2	2663		T3	3
valid_sources[0x6d]	1275919	1			T1	586		T2	2605		T3	4
valid_sources[0x6e]	2291937	1			T1	624		T2	2509		T3	14
valid_sources[0x6f]	1282514	1			T1	655		T2	2583		T32	1056
valid_sources[0x70]	2137367	1			T1	636		T2	2711		T32	1131
valid_sources[0x71]	1272095	1			T1	653		T2	2742		T3	11
valid_sources[0x72]	1273671	1			T1	682		T2	2685		T3	1
valid_sources[0x73]	1277128	1			T1	648		T2	2666		T3	15
valid_sources[0x74]	2257441	1			T1	603		T2	2705		T32	1123
valid_sources[0x75]	1277330	1			T1	674		T2	2583		T32	995
valid_sources[0x76]	1631544	1			T1	625		T2	2727		T3	6
valid_sources[0x77]	1541029	1			T1	633		T2	2616		T3	9
valid_sources[0x78]	1282140	1			T1	646		T2	2615		T32	1488
valid_sources[0x79]	1280794	1			T1	676		T2	2560		T3	1
valid_sources[0x7a]	1404697	1			T1	694		T2	2742		T3	11
valid_sources[0x7b]	3664834	1			T1	656		T2	2702		T32	1181
valid_sources[0x7c]	1272297	1			T1	663		T2	2682		T3	2
valid_sources[0x7d]	1411468	1			T1	610		T2	2570		T32	1274
valid_sources[0x7e]	1271604	1			T1	608		T2	2626		T3	8
valid_sources[0x7f]	1726696	1			T1	649		T2	2782		T3	9
valid_sources[0x80]	1273397	1			T1	662		T2	2748		T32	973

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

71159484

1

T1

35190

T2

112976

T3

350

values[0x0]

all_enables

biggest_size

60733947

1

T1

23324

T2

84315

T3

374

values[0x1]

all_enables

biggest_size

52363660

1

T1

20071

T2

71028

T3

344