Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	257875690	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

181390967

1

T1

12

T2

8726

T3

1061

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	228042694	1			T1	1		T2	9908		T3	781
values[0x0]	101548107	1			T1	13		T2	2259		T3	489
values[0x1]	109675856	1			T1	14		T2	2547		T3	556

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	200485350	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

238781307

1

T1

12

T2

10140

T3

1246

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1241005	1			T2	47		T3	11		T18	88
valid_sources[0x01]	3253968	1			T2	70		T18	78		T35	7285
valid_sources[0x02]	2184434	1			T2	56		T18	73		T35	7710
valid_sources[0x03]	1231375	1			T2	59		T18	87		T35	7918
valid_sources[0x04]	1245428	1			T2	63		T18	103		T35	7430
valid_sources[0x05]	1239214	1			T2	55		T18	94		T35	7224
valid_sources[0x06]	1242675	1			T2	59		T3	1		T18	102
valid_sources[0x07]	1376974	1			T2	44		T3	11		T18	110
valid_sources[0x08]	1239162	1			T2	60		T3	14		T18	93
valid_sources[0x09]	1265895	1			T2	54		T3	2		T18	70
valid_sources[0x0a]	1235135	1			T2	45		T18	95		T35	7818
valid_sources[0x0b]	1233866	1			T2	61		T3	1		T18	103
valid_sources[0x0c]	1242373	1			T2	57		T3	5		T18	102
valid_sources[0x0d]	1245035	1			T2	71		T18	70		T35	7537
valid_sources[0x0e]	1252858	1			T2	51		T18	101		T35	7895
valid_sources[0x0f]	1932924	1			T2	65		T3	21		T18	101
valid_sources[0x10]	1235808	1			T2	63		T3	2		T18	79
valid_sources[0x11]	1245897	1			T2	63		T18	86		T35	8129
valid_sources[0x12]	1245611	1			T2	54		T3	4		T18	112
valid_sources[0x13]	1238411	1			T2	65		T3	3		T18	93
valid_sources[0x14]	3632099	1			T2	58		T3	29		T18	103
valid_sources[0x15]	1687608	1			T2	57		T3	41		T18	89
valid_sources[0x16]	1234015	1			T1	1		T2	41		T18	72
valid_sources[0x17]	1292234	1			T2	54		T3	20		T18	91
valid_sources[0x18]	2152373	1			T2	71		T3	9		T18	87
valid_sources[0x19]	1235537	1			T2	60		T3	1		T18	99
valid_sources[0x1a]	2786858	1			T2	58		T3	1		T18	84
valid_sources[0x1b]	2159437	1			T2	55		T18	91		T35	7710
valid_sources[0x1c]	1237989	1			T2	58		T18	96		T35	7836
valid_sources[0x1d]	1636273	1			T2	51		T18	85		T35	7838
valid_sources[0x1e]	2160446	1			T2	47		T3	10		T18	104
valid_sources[0x1f]	1242359	1			T2	55		T3	22		T18	102
valid_sources[0x20]	1230613	1			T2	51		T3	27		T18	96
valid_sources[0x21]	1242346	1			T2	42		T18	102		T35	7548
valid_sources[0x22]	2110529	1			T2	47		T3	3		T18	109
valid_sources[0x23]	1240486	1			T2	67		T3	4		T18	82
valid_sources[0x24]	1291950	1			T2	77		T18	102		T35	7634
valid_sources[0x25]	1242485	1			T2	56		T3	5		T18	93
valid_sources[0x26]	2185288	1			T2	56		T3	1		T18	104
valid_sources[0x27]	1236372	1			T2	55		T3	2		T18	87
valid_sources[0x28]	1265455	1			T2	61		T3	1		T18	82
valid_sources[0x29]	1235360	1			T2	59		T18	98		T35	7878
valid_sources[0x2a]	5543805	1			T2	77		T3	6		T18	115
valid_sources[0x2b]	4019106	1			T2	67		T18	81		T35	7714
valid_sources[0x2c]	1236385	1			T2	47		T3	10		T18	111
valid_sources[0x2d]	2096890	1			T2	48		T18	84		T35	7829
valid_sources[0x2e]	2161129	1			T2	60		T3	4		T18	96
valid_sources[0x2f]	1242160	1			T2	41		T3	7		T18	119
valid_sources[0x30]	2328277	1			T2	58		T18	96		T35	7761
valid_sources[0x31]	1249224	1			T2	68		T3	1		T18	81
valid_sources[0x32]	1345081	1			T2	53		T3	4		T18	106
valid_sources[0x33]	1333120	1			T2	68		T18	106		T35	8039
valid_sources[0x34]	1239968	1			T1	3		T2	76		T3	2
valid_sources[0x35]	1240297	1			T2	67		T3	10		T18	101
valid_sources[0x36]	1243168	1			T2	61		T18	81		T35	8120
valid_sources[0x37]	1264319	1			T2	67		T3	9		T18	102
valid_sources[0x38]	1237954	1			T2	68		T18	105		T35	7857
valid_sources[0x39]	3300233	1			T2	64		T3	17		T18	83
valid_sources[0x3a]	1235750	1			T2	70		T3	1		T18	106
valid_sources[0x3b]	1331381	1			T2	68		T3	10		T18	112
valid_sources[0x3c]	1239880	1			T2	60		T3	8		T18	98
valid_sources[0x3d]	1240996	1			T2	53		T3	16		T18	89
valid_sources[0x3e]	1242708	1			T2	74		T3	4		T18	115
valid_sources[0x3f]	1235772	1			T2	49		T3	2		T18	85
valid_sources[0x40]	2340841	1			T2	58		T3	9		T18	98
valid_sources[0x41]	2107661	1			T2	48		T3	1		T18	94
valid_sources[0x42]	1241521	1			T2	59		T18	97		T35	7666
valid_sources[0x43]	1241179	1			T2	48		T3	7		T18	95
valid_sources[0x44]	1232458	1			T1	3		T2	47		T3	9
valid_sources[0x45]	1244810	1			T2	48		T18	93		T35	7467
valid_sources[0x46]	1239021	1			T2	50		T3	9		T18	97
valid_sources[0x47]	3339425	1			T2	55		T18	88		T35	7968
valid_sources[0x48]	1335375	1			T2	59		T3	4		T18	81
valid_sources[0x49]	1886221	1			T2	76		T18	97		T35	7731
valid_sources[0x4a]	1244383	1			T2	53		T3	11		T18	100
valid_sources[0x4b]	1244627	1			T2	48		T3	13		T18	108
valid_sources[0x4c]	1897573	1			T2	69		T18	102		T35	7640
valid_sources[0x4d]	1445054	1			T2	60		T3	4		T18	99
valid_sources[0x4e]	1234322	1			T2	64		T3	20		T18	90
valid_sources[0x4f]	1239985	1			T2	48		T18	81		T35	7306
valid_sources[0x50]	1295196	1			T2	74		T3	9		T18	87
valid_sources[0x51]	1305343	1			T2	49		T3	7		T18	93
valid_sources[0x52]	1676762	1			T2	59		T3	4		T18	91
valid_sources[0x53]	1235970	1			T2	65		T18	86		T35	7788
valid_sources[0x54]	1233483	1			T2	59		T3	8		T18	107
valid_sources[0x55]	1239840	1			T1	1		T2	47		T3	8
valid_sources[0x56]	1363282	1			T2	59		T18	117		T35	7493
valid_sources[0x57]	1263294	1			T2	68		T3	11		T18	98
valid_sources[0x58]	1232785	1			T2	43		T3	16		T18	92
valid_sources[0x59]	2144024	1			T2	63		T18	107		T35	7613
valid_sources[0x5a]	2089214	1			T2	73		T3	6		T18	106
valid_sources[0x5b]	1234545	1			T2	56		T3	1		T18	84
valid_sources[0x5c]	3577297	1			T2	56		T3	8		T18	92
valid_sources[0x5d]	1248633	1			T2	60		T3	10		T18	104
valid_sources[0x5e]	1244320	1			T2	39		T3	1		T18	104
valid_sources[0x5f]	1240623	1			T2	50		T3	5		T18	104
valid_sources[0x60]	1246088	1			T2	62		T3	16		T18	85
valid_sources[0x61]	4510940	1			T2	53		T18	116		T35	7402
valid_sources[0x62]	1493708	1			T2	70		T18	106		T35	7336
valid_sources[0x63]	1234088	1			T2	65		T3	25		T18	90
valid_sources[0x64]	3210266	1			T1	1		T2	72		T3	14
valid_sources[0x65]	1241752	1			T2	41		T3	2		T18	90
valid_sources[0x66]	2706873	1			T1	1		T2	58		T3	13
valid_sources[0x67]	1755052	1			T2	52		T18	111		T35	7589
valid_sources[0x68]	1271922	1			T2	66		T3	12		T18	102
valid_sources[0x69]	2150891	1			T1	1		T2	57		T3	7
valid_sources[0x6a]	1235396	1			T2	49		T3	1		T18	92
valid_sources[0x6b]	1240923	1			T2	60		T3	7		T18	99
valid_sources[0x6c]	1359584	1			T2	45		T3	2		T18	95
valid_sources[0x6d]	1242355	1			T2	64		T3	9		T18	87
valid_sources[0x6e]	1895058	1			T2	67		T3	2		T18	89
valid_sources[0x6f]	1241922	1			T2	70		T3	14		T18	100
valid_sources[0x70]	1241186	1			T2	65		T18	93		T35	7847
valid_sources[0x71]	1899207	1			T2	70		T3	12		T18	95
valid_sources[0x72]	1249115	1			T2	54		T3	5		T18	74
valid_sources[0x73]	1239868	1			T2	56		T3	1		T18	92
valid_sources[0x74]	1236732	1			T2	65		T3	10		T18	96
valid_sources[0x75]	1374355	1			T2	59		T3	1		T18	89
valid_sources[0x76]	2092513	1			T2	62		T18	113		T35	7802
valid_sources[0x77]	2097226	1			T2	67		T3	16		T18	86
valid_sources[0x78]	3218171	1			T2	70		T3	11		T18	93
valid_sources[0x79]	1231502	1			T2	59		T18	84		T35	7610
valid_sources[0x7a]	2164460	1			T2	50		T18	120		T35	7571
valid_sources[0x7b]	1525721	1			T2	35		T3	15		T18	107
valid_sources[0x7c]	2626742	1			T2	48		T3	40		T18	101
valid_sources[0x7d]	1242248	1			T2	48		T3	8		T18	87
valid_sources[0x7e]	1319564	1			T2	47		T3	20		T18	97
valid_sources[0x7f]	1238333	1			T2	54		T18	85		T35	7614
valid_sources[0x80]	1499294	1			T2	61		T3	10		T18	112

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

69978579

1

T1

1

T2

6207

T3

364

values[0x0]

all_enables

biggest_size

59892940

1

T1

6

T2

1325

T3

350

values[0x1]

all_enables

biggest_size

51519448

1

T1

5

T2

1194

T3

347