Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10324	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8960	1			T15	39		T18	24		T33	17
len_5001_7500	14109	1			T15	85		T18	24		T33	17
len_2501_5000	9198	1			T15	14		T18	24		T33	17
len_1025_2500	5371	1			T15	10		T18	14		T33	10
len_769_1024	6117	1			T3	8		T15	4		T18	2
len_513_768	6405	1			T3	9		T18	3		T33	2
len_257_512	20826	1			T3	23		T15	2		T18	2
len_0_256	256022	1			T3	21		T15	24		T18	211
len_keccak_block_sizes[72]	720	1			T18	2		T33	2		T34	2
len_keccak_block_sizes[104]	616	1			T18	2		T33	2		T34	2
len_keccak_block_sizes[136]	522	1			T33	2		T34	2		T36	2
len_keccak_block_sizes[144]	432	1			T33	2		T80	3		T133	2
len_keccak_block_sizes[168]	330	1			T80	3		T116	3		T119	3
len_1	754	1			T18	2		T33	2		T34	2
len_0	1168	1			T15	7		T18	2		T33	2