Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	256636758	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

180904207

1

T1

163

T2

2

T3

809203

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	227215714	1			T1	74		T2	1		T3	100988
values[0x0]	101098182	1			T1	59		T2	5		T3	452543
values[0x1]	109227069	1			T1	43		T2	6		T3	487065

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	199487131	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

238053834

1

T1

166

T2

2

T3

106011

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	3251110	1			T3	7614		T6	40		T7	602
valid_sources[0x01]	3242748	1			T3	7656		T6	40		T7	570
valid_sources[0x02]	1277530	1			T3	7646		T6	48		T7	537
valid_sources[0x03]	1277261	1			T3	7613		T6	49		T7	591
valid_sources[0x04]	1286424	1			T3	7609		T6	46		T7	608
valid_sources[0x05]	1278950	1			T3	7433		T6	48		T7	588
valid_sources[0x06]	1994211	1			T3	7629		T6	32		T7	590
valid_sources[0x07]	1276608	1			T3	7636		T6	50		T7	588
valid_sources[0x08]	3076405	1			T3	7554		T6	44		T7	603
valid_sources[0x09]	1279055	1			T3	7529		T6	30		T7	609
valid_sources[0x0a]	1276483	1			T3	7553		T6	41		T7	624
valid_sources[0x0b]	1300711	1			T3	7666		T6	45		T7	568
valid_sources[0x0c]	1460429	1			T3	7540		T6	31		T7	585
valid_sources[0x0d]	1274424	1			T3	7687		T6	42		T7	634
valid_sources[0x0e]	3222657	1			T3	7707		T6	38		T7	547
valid_sources[0x0f]	1732536	1			T3	7648		T6	44		T7	587
valid_sources[0x10]	2497443	1			T3	7544		T6	48		T7	589
valid_sources[0x11]	3699254	1			T3	7497		T6	36		T7	580
valid_sources[0x12]	1300485	1			T3	7799		T6	44		T7	591
valid_sources[0x13]	1279239	1			T3	7530		T6	34		T7	588
valid_sources[0x14]	1276750	1			T3	7537		T6	44		T7	568
valid_sources[0x15]	1275277	1			T3	7593		T6	38		T7	610
valid_sources[0x16]	1271857	1			T3	7566		T6	45		T7	587
valid_sources[0x17]	2792665	1			T3	7539		T6	34		T7	558
valid_sources[0x18]	1306723	1			T3	7724		T6	42		T7	569
valid_sources[0x19]	1274735	1			T3	7609		T6	40		T7	530
valid_sources[0x1a]	3646761	1			T3	7552		T6	44		T7	559
valid_sources[0x1b]	1275937	1			T3	7572		T6	41		T7	588
valid_sources[0x1c]	1284184	1			T3	7703		T6	42		T7	653
valid_sources[0x1d]	2162767	1			T3	7679		T6	47		T7	586
valid_sources[0x1e]	1277254	1			T3	7597		T6	36		T7	597
valid_sources[0x1f]	1277847	1			T3	7543		T6	44		T7	596
valid_sources[0x20]	1266143	1			T3	7531		T6	51		T7	608
valid_sources[0x21]	1281120	1			T3	7630		T6	50		T7	591
valid_sources[0x22]	1928648	1			T2	1		T3	7533		T6	47
valid_sources[0x23]	1418902	1			T3	7633		T6	45		T7	546
valid_sources[0x24]	1280531	1			T3	7697		T6	42		T7	558
valid_sources[0x25]	3051927	1			T3	7686		T6	51		T7	570
valid_sources[0x26]	4216337	1			T3	7751		T6	31		T7	585
valid_sources[0x27]	3617530	1			T3	7580		T6	42		T7	556
valid_sources[0x28]	1285589	1			T3	7561		T6	54		T7	537
valid_sources[0x29]	3252987	1			T3	7544		T6	50		T7	621
valid_sources[0x2a]	3608641	1			T3	7601		T6	47		T7	572
valid_sources[0x2b]	1411292	1			T3	7562		T6	45		T7	598
valid_sources[0x2c]	1285378	1			T3	7648		T6	34		T7	552
valid_sources[0x2d]	1533024	1			T3	7793		T6	48		T7	595
valid_sources[0x2e]	2227577	1			T3	7239		T6	42		T7	552
valid_sources[0x2f]	1290863	1			T3	7741		T6	53		T7	613
valid_sources[0x30]	1306405	1			T3	7369		T6	47		T7	546
valid_sources[0x31]	1276742	1			T3	7570		T6	49		T7	629
valid_sources[0x32]	1279212	1			T3	7614		T6	44		T7	587
valid_sources[0x33]	1274775	1			T3	7633		T6	47		T7	612
valid_sources[0x34]	1279152	1			T3	7500		T6	36		T7	643
valid_sources[0x35]	1459139	1			T3	7517		T6	51		T7	618
valid_sources[0x36]	1282006	1			T3	7736		T6	38		T7	557
valid_sources[0x37]	1431102	1			T3	7455		T6	51		T7	640
valid_sources[0x38]	3655706	1			T3	7365		T6	41		T7	540
valid_sources[0x39]	1317283	1			T3	7737		T6	35		T7	550
valid_sources[0x3a]	1282346	1			T3	7490		T6	37		T7	528
valid_sources[0x3b]	2170254	1			T3	7547		T6	38		T7	600
valid_sources[0x3c]	1305471	1			T3	7668		T6	63		T7	607
valid_sources[0x3d]	3258651	1			T3	7809		T6	34		T7	521
valid_sources[0x3e]	1271071	1			T3	7718		T6	32		T7	598
valid_sources[0x3f]	1279262	1			T3	7544		T6	47		T7	580
valid_sources[0x40]	1282024	1			T3	7696		T6	48		T7	611
valid_sources[0x41]	1282403	1			T3	7456		T6	34		T7	568
valid_sources[0x42]	1277624	1			T3	7736		T6	42		T7	597
valid_sources[0x43]	3627575	1			T3	7831		T6	41		T7	579
valid_sources[0x44]	1275989	1			T3	7647		T6	54		T7	577
valid_sources[0x45]	1280340	1			T3	7587		T6	46		T7	576
valid_sources[0x46]	1743546	1			T3	7623		T6	41		T7	655
valid_sources[0x47]	1269578	1			T3	7585		T6	39		T7	586
valid_sources[0x48]	1281761	1			T3	7656		T6	50		T7	592
valid_sources[0x49]	3245582	1			T3	7768		T6	40		T7	612
valid_sources[0x4a]	1279853	1			T3	7671		T6	39		T7	611
valid_sources[0x4b]	1268593	1			T3	7647		T6	43		T7	537
valid_sources[0x4c]	1284985	1			T3	7910		T6	43		T7	615
valid_sources[0x4d]	3668557	1			T3	7626		T6	42		T7	556
valid_sources[0x4e]	1317731	1			T3	7523		T6	44		T7	596
valid_sources[0x4f]	1278936	1			T3	7600		T6	41		T7	615
valid_sources[0x50]	1275212	1			T3	7517		T6	49		T7	629
valid_sources[0x51]	1276798	1			T3	7568		T6	50		T7	598
valid_sources[0x52]	1280434	1			T3	7723		T6	37		T7	597
valid_sources[0x53]	1592274	1			T3	7696		T6	41		T7	596
valid_sources[0x54]	1729694	1			T3	7612		T6	40		T7	598
valid_sources[0x55]	1286391	1			T2	2		T3	7507		T6	50
valid_sources[0x56]	1282779	1			T3	7546		T6	55		T7	569
valid_sources[0x57]	1934764	1			T3	7840		T6	46		T7	584
valid_sources[0x58]	2420577	1			T3	7756		T6	43		T7	554
valid_sources[0x59]	1281350	1			T3	7373		T6	39		T7	552
valid_sources[0x5a]	1413677	1			T3	7648		T6	46		T7	548
valid_sources[0x5b]	1280158	1			T3	7784		T6	45		T7	594
valid_sources[0x5c]	1580002	1			T3	7502		T6	150959		T7	580
valid_sources[0x5d]	1728669	1			T3	7674		T6	49		T7	608
valid_sources[0x5e]	1401388	1			T3	7666		T6	40		T7	544
valid_sources[0x5f]	2874141	1			T3	7618		T6	49		T7	577
valid_sources[0x60]	1279039	1			T3	7576		T6	43		T7	571
valid_sources[0x61]	1277836	1			T3	7643		T6	36		T7	576
valid_sources[0x62]	1270426	1			T3	7700		T6	48		T7	601
valid_sources[0x63]	1278035	1			T3	7558		T6	44		T7	553
valid_sources[0x64]	1275683	1			T3	7631		T6	49		T7	546
valid_sources[0x65]	1285464	1			T3	7618		T6	41		T7	573
valid_sources[0x66]	1275314	1			T3	7426		T6	51		T7	571
valid_sources[0x67]	1272101	1			T3	7736		T6	46		T7	645
valid_sources[0x68]	2159474	1			T3	7650		T6	45		T7	581
valid_sources[0x69]	3078930	1			T3	7604		T6	44		T7	596
valid_sources[0x6a]	2757835	1			T3	7631		T6	54		T7	535
valid_sources[0x6b]	1294890	1			T3	7676		T6	45		T7	562
valid_sources[0x6c]	1277267	1			T3	7695		T6	37		T7	617
valid_sources[0x6d]	1276554	1			T2	2		T3	7546		T6	46
valid_sources[0x6e]	1275608	1			T3	7520		T6	45		T7	595
valid_sources[0x6f]	1327215	1			T3	7515		T6	51		T7	634
valid_sources[0x70]	1938327	1			T3	7607		T6	53		T7	599
valid_sources[0x71]	1296600	1			T3	7669		T6	60		T7	585
valid_sources[0x72]	3850093	1			T3	7629		T6	28		T7	569
valid_sources[0x73]	1479849	1			T3	7316		T6	34		T7	635
valid_sources[0x74]	1303458	1			T3	7726		T6	42		T7	579
valid_sources[0x75]	1281370	1			T3	7680		T6	43		T7	574
valid_sources[0x76]	1277362	1			T3	7632		T6	35		T7	562
valid_sources[0x77]	1279700	1			T3	7718		T6	37		T7	582
valid_sources[0x78]	1273561	1			T3	7718		T6	50		T7	570
valid_sources[0x79]	1279502	1			T3	7652		T6	47		T7	609
valid_sources[0x7a]	1275084	1			T3	7552		T6	34		T7	585
valid_sources[0x7b]	1325323	1			T3	7563		T6	39		T7	613
valid_sources[0x7c]	1272264	1			T3	7488		T6	41		T7	603
valid_sources[0x7d]	1282242	1			T3	7626		T6	36		T7	626
valid_sources[0x7e]	1277162	1			T3	7553		T6	40		T7	595
valid_sources[0x7f]	1350378	1			T3	7558		T6	45		T7	585
valid_sources[0x80]	1278048	1			T3	7580		T6	47		T7	608

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

69987187

1

T1

68

T2

1

T3

321982

values[0x0]

all_enables

biggest_size

59623553

1

T1

54

T3

262969

T6

14173

values[0x1]

all_enables

biggest_size

51293467

1

T1

41

T2

1

T3

224252