Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	252719053	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

178949806

1

T1

825

T2

61387

T3

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	223957447	1			T1	1041		T2	68853		T3	1
values[0x0]	99845007	1			T1	435		T2	15472		T3	24
values[0x1]	107866405	1			T1	404		T2	16969		T3	15

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	196425456	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

235243403

1

T1

1179

T2

70662

T3

9

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1255297	1			T2	21		T3	1		T17	2
valid_sources[0x01]	1252429	1			T2	25		T17	3		T6	21
valid_sources[0x02]	2573542	1			T2	25		T17	3		T6	22
valid_sources[0x03]	1251774	1			T2	30		T17	8		T6	28
valid_sources[0x04]	1909488	1			T2	29		T17	9		T6	24
valid_sources[0x05]	1792431	1			T2	19		T17	2		T6	24
valid_sources[0x06]	1400443	1			T2	26		T17	3		T6	23
valid_sources[0x07]	1258553	1			T2	27		T6	23		T4	3
valid_sources[0x08]	1261411	1			T1	205		T2	19		T6	20
valid_sources[0x09]	1266117	1			T2	28		T17	15		T6	21
valid_sources[0x0a]	1264430	1			T2	25		T17	18		T6	29
valid_sources[0x0b]	1295065	1			T1	38		T2	24		T17	17
valid_sources[0x0c]	3225559	1			T2	33		T17	9		T6	18
valid_sources[0x0d]	1256137	1			T2	21		T17	1		T6	16
valid_sources[0x0e]	1258650	1			T2	23		T17	10		T6	18
valid_sources[0x0f]	1253336	1			T2	32		T17	6		T6	19
valid_sources[0x10]	2178700	1			T1	28		T2	26		T17	19
valid_sources[0x11]	1257931	1			T2	19		T6	27		T4	2
valid_sources[0x12]	1258004	1			T2	35		T17	8		T6	31
valid_sources[0x13]	2686507	1			T2	29		T17	2		T6	29
valid_sources[0x14]	1519899	1			T1	4		T2	32		T17	17
valid_sources[0x15]	1253458	1			T2	30		T17	2		T6	18
valid_sources[0x16]	1258786	1			T2	23		T17	3		T6	29
valid_sources[0x17]	1793835	1			T2	32		T17	10		T6	27
valid_sources[0x18]	3575646	1			T2	32		T6	22		T4	12
valid_sources[0x19]	2150663	1			T2	29		T17	13		T6	28
valid_sources[0x1a]	1711954	1			T2	31		T17	3		T6	20
valid_sources[0x1b]	1320470	1			T2	17		T17	7		T6	22
valid_sources[0x1c]	1357894	1			T2	29		T17	16		T6	26
valid_sources[0x1d]	1263634	1			T2	22		T17	4		T6	24
valid_sources[0x1e]	1258866	1			T2	22		T17	21		T6	28
valid_sources[0x1f]	2892150	1			T2	24		T17	4		T6	30
valid_sources[0x20]	1426576	1			T1	13		T2	29		T3	1
valid_sources[0x21]	1253471	1			T2	35		T17	12		T6	24
valid_sources[0x22]	1256741	1			T1	20		T2	28		T17	5
valid_sources[0x23]	1256414	1			T2	34		T17	7		T6	22
valid_sources[0x24]	1256715	1			T1	8		T2	25		T17	4
valid_sources[0x25]	2215057	1			T2	26		T17	8		T6	21
valid_sources[0x26]	2411802	1			T1	7		T2	24		T17	1
valid_sources[0x27]	1246164	1			T1	133		T2	27		T17	15
valid_sources[0x28]	1262849	1			T2	22		T17	20		T6	21
valid_sources[0x29]	1258814	1			T2	26		T17	7		T6	28
valid_sources[0x2a]	3593720	1			T1	79		T2	37		T3	1
valid_sources[0x2b]	1464989	1			T2	39		T17	11		T6	24
valid_sources[0x2c]	3240894	1			T2	28		T6	24		T4	5
valid_sources[0x2d]	1254221	1			T1	74		T2	34		T3	1
valid_sources[0x2e]	1265120	1			T1	76		T2	29		T17	9
valid_sources[0x2f]	1257351	1			T2	23		T17	3		T6	22
valid_sources[0x30]	1255260	1			T2	23		T3	1		T17	8
valid_sources[0x31]	2288011	1			T2	24		T3	1		T6	23
valid_sources[0x32]	1255964	1			T2	37		T17	10		T6	21
valid_sources[0x33]	1867814	1			T2	23		T17	1		T6	21
valid_sources[0x34]	2214718	1			T2	24		T3	2		T17	2
valid_sources[0x35]	1258867	1			T2	26		T17	8		T6	23
valid_sources[0x36]	1252974	1			T2	21		T17	16		T6	23
valid_sources[0x37]	1612570	1			T2	26		T17	1		T6	30
valid_sources[0x38]	1363987	1			T2	32		T17	5		T6	19
valid_sources[0x39]	1346284	1			T2	26		T6	20		T4	3
valid_sources[0x3a]	1944823	1			T2	29		T17	7		T6	25
valid_sources[0x3b]	2046315	1			T2	35		T17	25		T6	20
valid_sources[0x3c]	2752929	1			T2	32		T17	20		T6	28
valid_sources[0x3d]	1263566	1			T1	27		T2	22		T17	13
valid_sources[0x3e]	1254490	1			T2	35		T17	4		T6	16
valid_sources[0x3f]	1256004	1			T2	23		T6	26		T4	8
valid_sources[0x40]	1257732	1			T2	30		T17	10		T6	21
valid_sources[0x41]	1257029	1			T2	24		T17	6		T6	23
valid_sources[0x42]	1253213	1			T2	33		T3	1		T17	2
valid_sources[0x43]	1332887	1			T2	21		T17	11		T6	24
valid_sources[0x44]	1257185	1			T2	20		T17	7		T6	11
valid_sources[0x45]	1283242	1			T2	37		T17	28		T6	21
valid_sources[0x46]	1263127	1			T2	26		T17	5		T6	25
valid_sources[0x47]	1262434	1			T2	28		T17	2		T6	26
valid_sources[0x48]	1287894	1			T1	99		T2	26		T17	18
valid_sources[0x49]	1261405	1			T2	33		T17	16		T6	19
valid_sources[0x4a]	1259042	1			T2	27		T17	10		T6	19
valid_sources[0x4b]	1255150	1			T2	29		T6	21		T4	15
valid_sources[0x4c]	1298783	1			T2	28		T17	10		T6	17
valid_sources[0x4d]	3218037	1			T1	41		T2	24		T17	14
valid_sources[0x4e]	1360971	1			T2	33		T17	15		T6	17
valid_sources[0x4f]	1914532	1			T2	17		T17	1		T6	17
valid_sources[0x50]	1258819	1			T2	23		T17	17		T6	26
valid_sources[0x51]	1253241	1			T2	29		T17	6		T6	21
valid_sources[0x52]	1257606	1			T2	18		T17	4		T6	28
valid_sources[0x53]	2107823	1			T2	25		T17	8		T6	23
valid_sources[0x54]	1260000	1			T2	27		T17	17		T6	28
valid_sources[0x55]	1257239	1			T2	28		T6	18		T4	4
valid_sources[0x56]	1318152	1			T2	38		T17	6		T6	26
valid_sources[0x57]	1258706	1			T2	32		T17	8		T6	21
valid_sources[0x58]	1249191	1			T2	25		T17	4		T6	23
valid_sources[0x59]	1353561	1			T2	22		T17	7		T6	21
valid_sources[0x5a]	1259077	1			T2	19		T17	1		T6	24
valid_sources[0x5b]	1254858	1			T2	31		T17	22		T6	18
valid_sources[0x5c]	1257832	1			T2	27		T3	1		T17	11
valid_sources[0x5d]	1718007	1			T2	33		T17	15		T6	23
valid_sources[0x5e]	1258444	1			T2	32		T17	14		T6	17
valid_sources[0x5f]	1259555	1			T1	157		T2	32		T17	10
valid_sources[0x60]	1621139	1			T2	21		T6	26		T4	4
valid_sources[0x61]	2841207	1			T1	78		T2	22		T3	1
valid_sources[0x62]	1327808	1			T2	41		T17	16		T6	72178
valid_sources[0x63]	1255267	1			T2	27		T17	4		T6	20
valid_sources[0x64]	1449523	1			T2	22		T17	3		T6	23
valid_sources[0x65]	1256078	1			T2	33		T17	6		T6	24
valid_sources[0x66]	1255246	1			T1	8		T2	24		T17	17
valid_sources[0x67]	1261987	1			T2	23		T17	12		T6	24
valid_sources[0x68]	1258401	1			T1	22		T2	19		T6	31
valid_sources[0x69]	1523344	1			T2	30		T17	24		T6	14
valid_sources[0x6a]	1976482	1			T2	24		T17	15		T6	25
valid_sources[0x6b]	1360014	1			T1	197		T2	34		T3	1
valid_sources[0x6c]	1712584	1			T2	24		T17	7		T6	24
valid_sources[0x6d]	1252806	1			T2	29		T17	2		T6	34
valid_sources[0x6e]	1258537	1			T2	24		T6	16		T4	5
valid_sources[0x6f]	1253818	1			T1	65		T2	25		T3	1
valid_sources[0x70]	1373173	1			T2	25		T17	11		T6	22
valid_sources[0x71]	1270557	1			T2	35		T3	1		T17	16
valid_sources[0x72]	1269088	1			T1	52		T2	29		T17	8
valid_sources[0x73]	1247833	1			T2	32		T17	1		T6	23
valid_sources[0x74]	1253802	1			T2	33		T17	1		T6	29
valid_sources[0x75]	1265860	1			T2	28		T17	10		T6	31
valid_sources[0x76]	6073549	1			T2	21		T17	18		T6	22
valid_sources[0x77]	1261906	1			T2	24		T17	4		T6	22
valid_sources[0x78]	1513121	1			T1	3		T2	41		T3	1
valid_sources[0x79]	1705934	1			T2	23		T17	6		T6	21
valid_sources[0x7a]	1255108	1			T2	28		T17	5		T6	23
valid_sources[0x7b]	1259111	1			T1	16		T2	34		T17	26
valid_sources[0x7c]	3641184	1			T2	27		T17	27		T6	22
valid_sources[0x7d]	4493173	1			T1	27		T2	24		T17	11
valid_sources[0x7e]	1398296	1			T2	26		T17	6		T6	28
valid_sources[0x7f]	1258710	1			T2	25		T17	6		T6	21
valid_sources[0x80]	3778303	1			T1	3		T2	29		T17	4

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

69179475

1

T1

28

T2

43637

T17

348

values[0x0]

all_enables

biggest_size

58993418

1

T1

412

T2

9457

T3

6

values[0x1]

all_enables

biggest_size

50776913

1

T1

385

T2

8293

T3

2