Unified Coverage Report :: Group :: dv_base_reg_pkg::mubi_cov#(4,32'h00000006,32'h00000009)::mubi_cg

Group : dv_base_reg_pkg::mubi_cov#(4,32'h00000006,32'h00000009)::mubi_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if	100.00	1	100	1	64	64
mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if	100.00	1	100	1	64	64

---

Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

---

Group Instance : mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	6	0	6	100.00

Variables for Group Instance mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	6	0	6	100.00	100	1	1	0

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	571	1			T2	11		T14	10		T15	5
others[1]	616	1			T2	14		T14	9		T15	9
others[2]	544	1			T2	13		T14	16		T15	7
others[3]	997	1			T2	26		T14	19		T15	12
false	349436	1			T1	311		T2	304		T3	2338
true	346151	1			T1	310		T2	299		T3	2337

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	6	0	6	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	954	1			T2	19		T4	17		T14	16
others[1]	586	1			T2	13		T14	13		T15	7
others[2]	576	1			T2	11		T14	6		T15	7
others[3]	965	1			T2	21		T14	19		T15	10
false	349787	1			T1	311		T2	304		T3	2338
true	346149	1			T1	310		T2	299		T3	2337