Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174063 |
1 |
|
|
T7 |
1009 |
|
T8 |
776 |
|
T9 |
1285 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
92304 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
59775 |
1 |
|
|
T7 |
21 |
|
T8 |
25 |
|
T9 |
30 |
seven_bytes |
3227 |
1 |
|
|
T7 |
40 |
|
T8 |
26 |
|
T9 |
35 |
six_bytes |
3185 |
1 |
|
|
T7 |
25 |
|
T8 |
18 |
|
T9 |
34 |
five_bytes |
3148 |
1 |
|
|
T7 |
31 |
|
T8 |
21 |
|
T9 |
34 |
four_bytes |
3086 |
1 |
|
|
T7 |
23 |
|
T8 |
15 |
|
T9 |
39 |
three_bytes |
3175 |
1 |
|
|
T7 |
25 |
|
T8 |
21 |
|
T9 |
41 |
two_bytes |
3070 |
1 |
|
|
T7 |
18 |
|
T8 |
17 |
|
T9 |
32 |
one_byte |
3093 |
1 |
|
|
T7 |
29 |
|
T8 |
27 |
|
T9 |
30 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
170753 |
1 |
|
|
T7 |
993 |
|
T8 |
770 |
|
T9 |
1271 |
auto[1] |
3310 |
1 |
|
|
T7 |
16 |
|
T8 |
6 |
|
T9 |
14 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174063 |
1 |
|
|
T7 |
1009 |
|
T8 |
776 |
|
T9 |
1285 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174054 |
1 |
|
|
T7 |
1009 |
|
T8 |
776 |
|
T9 |
1285 |
auto[1] |
9 |
1 |
|
|
T187 |
1 |
|
T57 |
1 |
|
T188 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1121 |
1 |
|
|
T7 |
3 |
|
T8 |
3 |
|
T19 |
9 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3310 |
1 |
|
|
T7 |
16 |
|
T8 |
6 |
|
T9 |
14 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
179528 |
1 |
|
|
T7 |
1014 |
|
T8 |
783 |
|
T9 |
1945 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
95812 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
60837 |
1 |
|
|
T7 |
27 |
|
T8 |
13 |
|
T9 |
68 |
seven_bytes |
3211 |
1 |
|
|
T7 |
22 |
|
T8 |
22 |
|
T9 |
46 |
six_bytes |
3260 |
1 |
|
|
T7 |
23 |
|
T8 |
17 |
|
T9 |
56 |
five_bytes |
3318 |
1 |
|
|
T7 |
31 |
|
T8 |
21 |
|
T9 |
54 |
four_bytes |
3266 |
1 |
|
|
T7 |
22 |
|
T8 |
21 |
|
T9 |
61 |
three_bytes |
3257 |
1 |
|
|
T7 |
15 |
|
T8 |
18 |
|
T9 |
64 |
two_bytes |
3251 |
1 |
|
|
T7 |
35 |
|
T8 |
14 |
|
T9 |
53 |
one_byte |
3316 |
1 |
|
|
T7 |
34 |
|
T8 |
22 |
|
T9 |
56 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
176172 |
1 |
|
|
T7 |
1004 |
|
T8 |
775 |
|
T9 |
1925 |
auto[1] |
3356 |
1 |
|
|
T7 |
10 |
|
T8 |
8 |
|
T9 |
20 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
179528 |
1 |
|
|
T7 |
1014 |
|
T8 |
783 |
|
T9 |
1945 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
179517 |
1 |
|
|
T7 |
1014 |
|
T8 |
783 |
|
T9 |
1945 |
auto[1] |
11 |
1 |
|
|
T19 |
1 |
|
T18 |
1 |
|
T189 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1142 |
1 |
|
|
T7 |
1 |
|
T8 |
2 |
|
T9 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3356 |
1 |
|
|
T7 |
10 |
|
T8 |
8 |
|
T9 |
20 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
354363 |
1 |
|
|
T7 |
2241 |
|
T8 |
1335 |
|
T9 |
3461 |
auto[1] |
474 |
1 |
|
|
T10 |
11 |
|
T11 |
1 |
|
T12 |
31 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
193817 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
115022 |
1 |
|
|
T7 |
54 |
|
T8 |
47 |
|
T9 |
97 |
seven_bytes |
6585 |
1 |
|
|
T7 |
66 |
|
T8 |
28 |
|
T9 |
80 |
six_bytes |
6491 |
1 |
|
|
T7 |
51 |
|
T8 |
29 |
|
T9 |
101 |
five_bytes |
6581 |
1 |
|
|
T7 |
66 |
|
T8 |
49 |
|
T9 |
83 |
four_bytes |
6556 |
1 |
|
|
T7 |
65 |
|
T8 |
44 |
|
T9 |
75 |
three_bytes |
6629 |
1 |
|
|
T7 |
58 |
|
T8 |
40 |
|
T9 |
105 |
two_bytes |
6678 |
1 |
|
|
T7 |
54 |
|
T8 |
30 |
|
T9 |
88 |
one_byte |
6478 |
1 |
|
|
T7 |
55 |
|
T8 |
33 |
|
T9 |
87 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
348215 |
1 |
|
|
T7 |
2217 |
|
T8 |
1309 |
|
T9 |
3421 |
auto[1] |
6622 |
1 |
|
|
T7 |
24 |
|
T8 |
26 |
|
T9 |
40 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
354837 |
1 |
|
|
T7 |
2241 |
|
T8 |
1335 |
|
T9 |
3461 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
354807 |
1 |
|
|
T7 |
2241 |
|
T8 |
1335 |
|
T9 |
3461 |
auto[1] |
30 |
1 |
|
|
T190 |
1 |
|
T55 |
1 |
|
T191 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2209 |
1 |
|
|
T7 |
3 |
|
T8 |
8 |
|
T9 |
5 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6622 |
1 |
|
|
T7 |
24 |
|
T8 |
26 |
|
T9 |
40 |