Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
172502 |
1 |
|
|
T7 |
2680 |
|
T9 |
1665 |
|
T40 |
292 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
98639 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
50097 |
1 |
|
|
T7 |
60 |
|
T9 |
44 |
|
T40 |
286 |
seven_bytes |
3451 |
1 |
|
|
T7 |
82 |
|
T9 |
52 |
|
T19 |
19 |
six_bytes |
3414 |
1 |
|
|
T7 |
83 |
|
T9 |
46 |
|
T19 |
15 |
five_bytes |
3362 |
1 |
|
|
T7 |
67 |
|
T9 |
49 |
|
T19 |
16 |
four_bytes |
3450 |
1 |
|
|
T7 |
85 |
|
T9 |
57 |
|
T19 |
15 |
three_bytes |
3367 |
1 |
|
|
T7 |
67 |
|
T9 |
42 |
|
T19 |
17 |
two_bytes |
3395 |
1 |
|
|
T7 |
61 |
|
T9 |
44 |
|
T19 |
14 |
one_byte |
3327 |
1 |
|
|
T7 |
74 |
|
T9 |
44 |
|
T19 |
21 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
169404 |
1 |
|
|
T7 |
2646 |
|
T9 |
1647 |
|
T40 |
280 |
auto[1] |
3098 |
1 |
|
|
T7 |
34 |
|
T9 |
18 |
|
T40 |
12 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
172502 |
1 |
|
|
T7 |
2680 |
|
T9 |
1665 |
|
T40 |
292 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
172486 |
1 |
|
|
T7 |
2680 |
|
T9 |
1664 |
|
T40 |
292 |
auto[1] |
16 |
1 |
|
|
T9 |
1 |
|
T4 |
1 |
|
T103 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
994 |
1 |
|
|
T7 |
5 |
|
T9 |
3 |
|
T40 |
6 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3098 |
1 |
|
|
T7 |
34 |
|
T9 |
18 |
|
T40 |
12 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
185383 |
1 |
|
|
T7 |
1631 |
|
T8 |
156 |
|
T9 |
1988 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
105036 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
55093 |
1 |
|
|
T7 |
32 |
|
T8 |
154 |
|
T9 |
45 |
seven_bytes |
3574 |
1 |
|
|
T7 |
44 |
|
T9 |
54 |
|
T19 |
47 |
six_bytes |
3637 |
1 |
|
|
T7 |
47 |
|
T9 |
56 |
|
T19 |
42 |
five_bytes |
3623 |
1 |
|
|
T7 |
46 |
|
T9 |
42 |
|
T19 |
39 |
four_bytes |
3639 |
1 |
|
|
T7 |
42 |
|
T9 |
48 |
|
T19 |
50 |
three_bytes |
3678 |
1 |
|
|
T7 |
33 |
|
T9 |
49 |
|
T19 |
44 |
two_bytes |
3597 |
1 |
|
|
T7 |
34 |
|
T9 |
61 |
|
T19 |
52 |
one_byte |
3506 |
1 |
|
|
T7 |
40 |
|
T9 |
52 |
|
T19 |
41 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
182061 |
1 |
|
|
T7 |
1613 |
|
T8 |
152 |
|
T9 |
1966 |
auto[1] |
3322 |
1 |
|
|
T7 |
18 |
|
T8 |
4 |
|
T9 |
22 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
185383 |
1 |
|
|
T7 |
1631 |
|
T8 |
156 |
|
T9 |
1988 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
185371 |
1 |
|
|
T7 |
1631 |
|
T8 |
156 |
|
T9 |
1988 |
auto[1] |
12 |
1 |
|
|
T19 |
1 |
|
T21 |
1 |
|
T82 |
2 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1063 |
1 |
|
|
T7 |
1 |
|
T8 |
2 |
|
T9 |
5 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3322 |
1 |
|
|
T7 |
18 |
|
T8 |
4 |
|
T9 |
22 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
351013 |
1 |
|
|
T7 |
6462 |
|
T8 |
189 |
|
T9 |
2679 |
auto[1] |
322 |
1 |
|
|
T4 |
15 |
|
T10 |
12 |
|
T11 |
55 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
201282 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
101995 |
1 |
|
|
T7 |
177 |
|
T8 |
187 |
|
T9 |
71 |
seven_bytes |
6885 |
1 |
|
|
T7 |
191 |
|
T9 |
73 |
|
T19 |
85 |
six_bytes |
6952 |
1 |
|
|
T7 |
180 |
|
T9 |
49 |
|
T19 |
77 |
five_bytes |
6899 |
1 |
|
|
T7 |
186 |
|
T9 |
72 |
|
T19 |
87 |
four_bytes |
6891 |
1 |
|
|
T7 |
183 |
|
T9 |
68 |
|
T19 |
82 |
three_bytes |
6875 |
1 |
|
|
T7 |
176 |
|
T9 |
69 |
|
T19 |
75 |
two_bytes |
6805 |
1 |
|
|
T7 |
191 |
|
T9 |
83 |
|
T19 |
95 |
one_byte |
6751 |
1 |
|
|
T7 |
164 |
|
T9 |
60 |
|
T19 |
79 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
344963 |
1 |
|
|
T7 |
6392 |
|
T8 |
185 |
|
T9 |
2643 |
auto[1] |
6372 |
1 |
|
|
T7 |
70 |
|
T8 |
4 |
|
T9 |
36 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
351335 |
1 |
|
|
T7 |
6462 |
|
T8 |
189 |
|
T9 |
2679 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
351313 |
1 |
|
|
T7 |
6462 |
|
T8 |
189 |
|
T9 |
2679 |
auto[1] |
22 |
1 |
|
|
T77 |
1 |
|
T178 |
1 |
|
T82 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2012 |
1 |
|
|
T7 |
10 |
|
T8 |
2 |
|
T9 |
7 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6372 |
1 |
|
|
T7 |
70 |
|
T8 |
4 |
|
T9 |
36 |