Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	260421808	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

185042884

1

T1

59650

T2

177041

T3

274053

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	230732682	1			T1	66334		T2	215401		T3	82310
values[0x0]	103232769	1			T1	15712		T2	81545		T3	113253
values[0x1]	111499241	1			T1	16897		T2	88594		T3	112262

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	202524927	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

242939765

1

T1

68754

T2

223604

T3

282924

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1355485	1			T1	436		T2	1463		T3	1157
valid_sources[0x01]	1349770	1			T1	351		T2	1659		T3	1218
valid_sources[0x02]	1350137	1			T1	344		T2	1522		T3	1207
valid_sources[0x03]	1349923	1			T1	377		T2	1547		T3	1162
valid_sources[0x04]	1641309	1			T1	435		T2	1572		T3	1258
valid_sources[0x05]	1801502	1			T1	333		T2	1640		T3	1237
valid_sources[0x06]	1876610	1			T1	419		T2	1654		T3	1233
valid_sources[0x07]	3643123	1			T1	417		T2	1396		T3	1181
valid_sources[0x08]	1344716	1			T1	374		T2	1469		T3	1182
valid_sources[0x09]	1357931	1			T1	459		T2	1544		T3	1159
valid_sources[0x0a]	1540054	1			T1	386		T2	1298		T3	1152
valid_sources[0x0b]	2930938	1			T1	330		T2	1672		T3	1227
valid_sources[0x0c]	1412549	1			T1	347		T2	1619		T3	1246
valid_sources[0x0d]	1820033	1			T1	372		T2	1362		T3	1170
valid_sources[0x0e]	1353929	1			T1	505		T2	1485		T3	1162
valid_sources[0x0f]	1351492	1			T1	412		T2	1426		T3	1189
valid_sources[0x10]	1358468	1			T1	434		T2	1459		T3	1244
valid_sources[0x11]	1353599	1			T1	440		T2	1432		T3	1198
valid_sources[0x12]	2600344	1			T1	436		T2	1456		T3	1174
valid_sources[0x13]	2644070	1			T1	358		T2	1434		T3	1216
valid_sources[0x14]	2081721	1			T1	325		T2	1642		T3	1210
valid_sources[0x15]	1467501	1			T1	389		T2	1410		T3	1165
valid_sources[0x16]	1358025	1			T1	349		T2	1335		T3	1197
valid_sources[0x17]	1360429	1			T1	368		T2	1438		T3	1163
valid_sources[0x18]	2091457	1			T1	376		T2	1532		T3	1204
valid_sources[0x19]	1385688	1			T1	483		T2	1508		T3	1180
valid_sources[0x1a]	1354363	1			T1	438		T2	1452		T3	1176
valid_sources[0x1b]	3713437	1			T1	275		T2	1518		T3	1230
valid_sources[0x1c]	1343285	1			T1	311		T2	1353		T3	1279
valid_sources[0x1d]	1351033	1			T1	356		T2	1409		T3	1306
valid_sources[0x1e]	1995951	1			T1	332		T2	1620		T3	1160
valid_sources[0x1f]	1496674	1			T1	412		T2	1375		T3	1178
valid_sources[0x20]	1802422	1			T1	425		T2	1509		T3	1153
valid_sources[0x21]	1477923	1			T1	356		T2	1646		T3	1247
valid_sources[0x22]	1358464	1			T1	365		T2	1622		T3	1161
valid_sources[0x23]	1356642	1			T1	415		T2	1475		T3	1220
valid_sources[0x24]	1355040	1			T1	372		T2	1791		T3	1159
valid_sources[0x25]	1354393	1			T1	388		T2	1621		T3	1208
valid_sources[0x26]	1355000	1			T1	354		T2	1507		T3	1221
valid_sources[0x27]	2235022	1			T1	384		T2	1506		T3	1163
valid_sources[0x28]	1348797	1			T1	448		T2	1555		T3	1201
valid_sources[0x29]	3129967	1			T1	401		T2	1487		T3	1265
valid_sources[0x2a]	1510865	1			T1	382		T2	1550		T3	1194
valid_sources[0x2b]	1477701	1			T1	331		T2	1575		T3	1263
valid_sources[0x2c]	2679800	1			T1	347		T2	1371		T3	1214
valid_sources[0x2d]	1359171	1			T1	384		T2	1400		T3	1182
valid_sources[0x2e]	1352382	1			T1	395		T2	1559		T3	1191
valid_sources[0x2f]	1356764	1			T1	302		T2	1620		T3	1247
valid_sources[0x30]	1353670	1			T1	371		T2	1427		T3	1150
valid_sources[0x31]	3669861	1			T1	412		T2	1597		T3	1247
valid_sources[0x32]	2284543	1			T1	446		T2	1377		T3	1171
valid_sources[0x33]	1358394	1			T1	406		T2	1672		T3	1171
valid_sources[0x34]	1925267	1			T1	463		T2	1370		T3	1236
valid_sources[0x35]	3649581	1			T1	297		T2	1423		T3	1259
valid_sources[0x36]	1347874	1			T1	352		T2	1524		T3	1204
valid_sources[0x37]	2214349	1			T1	329		T2	1579		T3	1218
valid_sources[0x38]	1386799	1			T1	369		T2	1491		T3	1152
valid_sources[0x39]	1355194	1			T1	344		T2	1473		T3	1154
valid_sources[0x3a]	1386727	1			T1	382		T2	1417		T3	1188
valid_sources[0x3b]	3294506	1			T1	411		T2	1361		T3	1175
valid_sources[0x3c]	1354688	1			T1	414		T2	1505		T3	1200
valid_sources[0x3d]	1354341	1			T1	367		T2	1485		T3	1165
valid_sources[0x3e]	2006697	1			T1	420		T2	1700		T3	1207
valid_sources[0x3f]	1353396	1			T1	484		T2	1489		T3	1175
valid_sources[0x40]	3346027	1			T1	345		T2	1470		T3	1270
valid_sources[0x41]	1358424	1			T1	297		T2	1430		T3	1258
valid_sources[0x42]	1357094	1			T1	383		T2	1724		T3	1225
valid_sources[0x43]	2207700	1			T1	379		T2	1616		T3	1185
valid_sources[0x44]	1350455	1			T1	312		T2	1471		T3	1218
valid_sources[0x45]	1358524	1			T1	349		T2	1322		T3	1164
valid_sources[0x46]	1347974	1			T1	344		T2	1562		T3	1187
valid_sources[0x47]	1352942	1			T1	304		T2	1346		T3	1163
valid_sources[0x48]	1363578	1			T1	422		T2	1627		T3	1173
valid_sources[0x49]	1355268	1			T1	441		T2	1313		T3	1184
valid_sources[0x4a]	1489118	1			T1	401		T2	1523		T3	1163
valid_sources[0x4b]	1348905	1			T1	469		T2	1465		T3	1261
valid_sources[0x4c]	1514854	1			T1	415		T2	1516		T3	1228
valid_sources[0x4d]	2192796	1			T1	387		T2	1557		T3	1233
valid_sources[0x4e]	1350189	1			T1	328		T2	1597		T3	1140
valid_sources[0x4f]	2476066	1			T1	387		T2	1358		T3	1225
valid_sources[0x50]	2258211	1			T1	364		T2	1534		T3	1202
valid_sources[0x51]	2298706	1			T1	382		T2	1586		T3	1139
valid_sources[0x52]	1502473	1			T1	371		T2	1602		T3	1239
valid_sources[0x53]	1355115	1			T1	446		T2	1561		T3	1183
valid_sources[0x54]	2110698	1			T1	421		T2	1407		T3	1196
valid_sources[0x55]	3688206	1			T1	431		T2	1491		T3	1198
valid_sources[0x56]	1369651	1			T1	432		T2	1523		T3	1189
valid_sources[0x57]	1353670	1			T1	382		T2	1585		T3	1137
valid_sources[0x58]	1350067	1			T1	437		T2	1491		T3	1254
valid_sources[0x59]	1490688	1			T1	365		T2	1399		T3	1169
valid_sources[0x5a]	1427972	1			T1	366		T2	1401		T3	1214
valid_sources[0x5b]	1357159	1			T1	443		T2	1263		T3	1201
valid_sources[0x5c]	1360289	1			T1	397		T2	1531		T3	1183
valid_sources[0x5d]	1353608	1			T1	431		T2	1392		T3	1244
valid_sources[0x5e]	4331191	1			T1	360		T2	1652		T3	1200
valid_sources[0x5f]	1353038	1			T1	414		T2	1751		T3	1141
valid_sources[0x60]	1441784	1			T1	366		T2	1555		T3	1171
valid_sources[0x61]	2278166	1			T1	366		T2	1453		T3	1163
valid_sources[0x62]	2261374	1			T1	345		T2	1581		T3	1181
valid_sources[0x63]	1356391	1			T1	402		T2	1508		T3	1202
valid_sources[0x64]	1356200	1			T1	438		T2	1359		T3	1302
valid_sources[0x65]	1375646	1			T1	336		T2	1463		T3	1101
valid_sources[0x66]	1353022	1			T1	334		T2	1489		T3	1202
valid_sources[0x67]	1351290	1			T1	452		T2	1312		T3	1192
valid_sources[0x68]	1359889	1			T1	310		T2	1594		T3	1224
valid_sources[0x69]	2201287	1			T1	422		T2	1338		T3	1214
valid_sources[0x6a]	1353711	1			T1	373		T2	1446		T3	1200
valid_sources[0x6b]	1353050	1			T1	378		T2	1822		T3	1126
valid_sources[0x6c]	1354293	1			T1	468		T2	1556		T3	1191
valid_sources[0x6d]	1351178	1			T1	323		T2	1378		T3	1156
valid_sources[0x6e]	1358708	1			T1	418		T2	1593		T3	1193
valid_sources[0x6f]	1353099	1			T1	294		T2	1529		T3	1260
valid_sources[0x70]	3951923	1			T1	423		T2	1622		T3	1245
valid_sources[0x71]	1354546	1			T1	444		T2	1443		T3	1183
valid_sources[0x72]	2424152	1			T1	369		T2	1429		T3	1258
valid_sources[0x73]	1356512	1			T1	439		T2	1568		T3	1175
valid_sources[0x74]	1379455	1			T1	337		T2	1328		T3	1266
valid_sources[0x75]	2022550	1			T1	358		T2	1493		T3	1139
valid_sources[0x76]	1354849	1			T1	390		T2	1343		T3	1203
valid_sources[0x77]	1692919	1			T1	457		T2	1566		T3	1270
valid_sources[0x78]	2416884	1			T1	400		T2	1618		T3	1190
valid_sources[0x79]	1351561	1			T1	359		T2	1416		T3	1165
valid_sources[0x7a]	3873171	1			T1	394		T2	1407		T3	1150
valid_sources[0x7b]	1353408	1			T1	378		T2	1544		T3	1180
valid_sources[0x7c]	1356318	1			T1	445		T2	1460		T3	1198
valid_sources[0x7d]	1353483	1			T1	390		T2	1597		T3	1277
valid_sources[0x7e]	2692277	1			T1	359		T2	1474		T3	1224
valid_sources[0x7f]	1367445	1			T1	382		T2	1356		T3	1209
valid_sources[0x80]	1442386	1			T1	349		T2	1541		T3	1210

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

71688988

1

T1

41412

T2

87485

T3

51667

values[0x0]

all_enables

biggest_size

60928336

1

T1

9740

T2

47967

T3

111860

values[0x1]

all_enables

biggest_size

52425560

1

T1

8498

T2

41589

T3

110526