Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
148650 |
1 |
|
|
T7 |
115 |
|
T8 |
1812 |
|
T17 |
1324 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
78839 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
51231 |
1 |
|
|
T7 |
114 |
|
T8 |
60 |
|
T17 |
38 |
seven_bytes |
2667 |
1 |
|
|
T8 |
50 |
|
T17 |
42 |
|
T20 |
28 |
six_bytes |
2711 |
1 |
|
|
T8 |
41 |
|
T17 |
41 |
|
T20 |
18 |
five_bytes |
2630 |
1 |
|
|
T8 |
40 |
|
T17 |
29 |
|
T20 |
27 |
four_bytes |
2636 |
1 |
|
|
T8 |
52 |
|
T17 |
36 |
|
T20 |
35 |
three_bytes |
2613 |
1 |
|
|
T8 |
52 |
|
T17 |
34 |
|
T20 |
22 |
two_bytes |
2696 |
1 |
|
|
T8 |
39 |
|
T17 |
34 |
|
T20 |
27 |
one_byte |
2627 |
1 |
|
|
T8 |
43 |
|
T17 |
38 |
|
T20 |
27 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
145770 |
1 |
|
|
T7 |
113 |
|
T8 |
1792 |
|
T17 |
1304 |
auto[1] |
2880 |
1 |
|
|
T7 |
2 |
|
T8 |
20 |
|
T17 |
20 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
148650 |
1 |
|
|
T7 |
115 |
|
T8 |
1812 |
|
T17 |
1324 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
148641 |
1 |
|
|
T7 |
115 |
|
T8 |
1812 |
|
T17 |
1324 |
auto[1] |
9 |
1 |
|
|
T15 |
1 |
|
T171 |
1 |
|
T172 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
974 |
1 |
|
|
T7 |
1 |
|
T8 |
5 |
|
T17 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2880 |
1 |
|
|
T7 |
2 |
|
T8 |
20 |
|
T17 |
20 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
157132 |
1 |
|
|
T7 |
319 |
|
T8 |
1813 |
|
T17 |
901 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
81988 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
55820 |
1 |
|
|
T7 |
315 |
|
T8 |
56 |
|
T17 |
20 |
seven_bytes |
2798 |
1 |
|
|
T8 |
51 |
|
T17 |
26 |
|
T20 |
28 |
six_bytes |
2840 |
1 |
|
|
T8 |
61 |
|
T17 |
28 |
|
T20 |
20 |
five_bytes |
2747 |
1 |
|
|
T8 |
51 |
|
T17 |
30 |
|
T20 |
17 |
four_bytes |
2758 |
1 |
|
|
T8 |
45 |
|
T17 |
22 |
|
T20 |
30 |
three_bytes |
2709 |
1 |
|
|
T8 |
40 |
|
T17 |
25 |
|
T20 |
22 |
two_bytes |
2726 |
1 |
|
|
T8 |
47 |
|
T17 |
21 |
|
T20 |
14 |
one_byte |
2746 |
1 |
|
|
T8 |
46 |
|
T17 |
25 |
|
T20 |
29 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
154078 |
1 |
|
|
T7 |
311 |
|
T8 |
1791 |
|
T17 |
883 |
auto[1] |
3054 |
1 |
|
|
T7 |
8 |
|
T8 |
22 |
|
T17 |
18 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
157132 |
1 |
|
|
T7 |
319 |
|
T8 |
1813 |
|
T17 |
901 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
157124 |
1 |
|
|
T7 |
319 |
|
T8 |
1813 |
|
T17 |
901 |
auto[1] |
8 |
1 |
|
|
T57 |
1 |
|
T173 |
1 |
|
T174 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1057 |
1 |
|
|
T7 |
4 |
|
T8 |
6 |
|
T17 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3054 |
1 |
|
|
T7 |
8 |
|
T8 |
22 |
|
T17 |
18 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
294079 |
1 |
|
|
T1 |
111 |
|
T7 |
408 |
|
T8 |
1507 |
auto[1] |
386 |
1 |
|
|
T5 |
28 |
|
T9 |
12 |
|
T10 |
17 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
153001 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
105120 |
1 |
|
|
T1 |
110 |
|
T7 |
401 |
|
T8 |
41 |
seven_bytes |
5330 |
1 |
|
|
T8 |
40 |
|
T17 |
60 |
|
T20 |
48 |
six_bytes |
5253 |
1 |
|
|
T8 |
46 |
|
T17 |
65 |
|
T20 |
58 |
five_bytes |
5179 |
1 |
|
|
T8 |
23 |
|
T17 |
60 |
|
T20 |
53 |
four_bytes |
5173 |
1 |
|
|
T8 |
39 |
|
T17 |
66 |
|
T20 |
45 |
three_bytes |
5150 |
1 |
|
|
T8 |
41 |
|
T17 |
56 |
|
T20 |
54 |
two_bytes |
5163 |
1 |
|
|
T8 |
39 |
|
T17 |
77 |
|
T20 |
53 |
one_byte |
5096 |
1 |
|
|
T8 |
41 |
|
T17 |
62 |
|
T20 |
48 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
288745 |
1 |
|
|
T1 |
109 |
|
T7 |
394 |
|
T8 |
1479 |
auto[1] |
5720 |
1 |
|
|
T1 |
2 |
|
T7 |
14 |
|
T8 |
28 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
294465 |
1 |
|
|
T1 |
111 |
|
T7 |
408 |
|
T8 |
1507 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
294437 |
1 |
|
|
T1 |
111 |
|
T7 |
408 |
|
T8 |
1507 |
auto[1] |
28 |
1 |
|
|
T19 |
1 |
|
T175 |
1 |
|
T176 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1987 |
1 |
|
|
T1 |
1 |
|
T7 |
7 |
|
T8 |
3 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
5720 |
1 |
|
|
T1 |
2 |
|
T7 |
14 |
|
T8 |
28 |