| SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 | 
| NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| push_pull_agent_pkg.uvm_test_top.env.m_kmac_app_agent[0].m_data_push_agent.cov::m_valid_ready_cg | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| push_pull_agent_pkg.uvm_test_top.env.m_kmac_app_agent[1].m_data_push_agent.cov::m_valid_ready_cg | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| push_pull_agent_pkg.uvm_test_top.env.m_kmac_app_agent[2].m_data_push_agent.cov::m_valid_ready_cg | 100.00 | 1 | 100 | 1 | 64 | 64 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 4 | 0 | 4 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| cp_valid_ready | 4 | 0 | 4 | 100.00 | 100 | 1 | 1 | 4 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 4 | 0 | 4 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| cp_valid_ready | 4 | 0 | 4 | 100.00 | 100 | 1 | 1 | 4 | 
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING | 
| 100.00 | 1 | 100 | 1 | 64 | 64 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Variables | 4 | 0 | 4 | 100.00 | 
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT | 
| cp_valid_ready | 4 | 0 | 4 | 100.00 | 100 | 1 | 1 | 4 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 4 | 0 | 4 | 100.00 | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 52827 | 1 | T1 | 18 | T6 | 574 | T4 | 15 | ||||
| auto[1] | 21699 | 1 | T1 | 18 | T3 | 1 | T6 | 12 | ||||
| auto[2] | 286370 | 1 | T1 | 1218 | T6 | 2033 | T4 | 1119 | ||||
| auto[3] | 307303 | 1 | T1 | 1236 | T6 | 2052 | T4 | 1134 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 4 | 0 | 4 | 100.00 | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 29800 | 1 | T6 | 267 | T7 | 112 | T8 | 8 | ||||
| auto[1] | 7439 | 1 | T3 | 1 | T6 | 5 | T7 | 4 | ||||
| auto[2] | 144409 | 1 | T6 | 948 | T7 | 491 | T8 | 464 | ||||
| auto[3] | 150840 | 1 | T6 | 956 | T7 | 495 | T8 | 472 | 
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | 
| Automatically Generated Bins | 4 | 0 | 4 | 100.00 | 
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| auto[0] | 26474 | 1 | T6 | 188 | T7 | 135 | T8 | 12 | ||||
| auto[1] | 11080 | 1 | T3 | 1 | T6 | 5 | T7 | 4 | ||||
| auto[2] | 122720 | 1 | T6 | 624 | T7 | 461 | T14 | 1095 | ||||
| auto[3] | 132786 | 1 | T6 | 632 | T7 | 466 | T8 | 40 | 
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |