SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
100.00 | 100.00 | 1 | 100 | 1 | 1 | 64 | 64 |
NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_absorb_mubi_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
mubi4_cov_of_mubi4_cov_of_tb.dut.kmac_sha3_done_mubi_cov_if | 100.00 | 1 | 100 | 1 | 64 | 64 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
cp_value | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 610 | 1 | T15 | 12 | T16 | 16 | T17 | 7 | ||||
others[1] | 575 | 1 | T15 | 12 | T16 | 6 | T17 | 18 | ||||
others[2] | 598 | 1 | T15 | 10 | T16 | 10 | T17 | 15 | ||||
others[3] | 1036 | 1 | T15 | 23 | T16 | 18 | T17 | 25 | ||||
false | 349082 | 1 | T1 | 161 | T2 | 93 | T3 | 88 | ||||
true | 345604 | 1 | T1 | 160 | T2 | 92 | T3 | 86 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
others[0] | 1015 | 1 | T15 | 13 | T5 | 15 | T16 | 11 | ||||
others[1] | 638 | 1 | T15 | 11 | T16 | 12 | T17 | 19 | ||||
others[2] | 596 | 1 | T15 | 15 | T16 | 9 | T17 | 14 | ||||
others[3] | 974 | 1 | T15 | 18 | T16 | 18 | T17 | 21 | ||||
false | 349482 | 1 | T1 | 161 | T2 | 93 | T3 | 88 | ||||
true | 345600 | 1 | T1 | 160 | T2 | 92 | T3 | 86 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |