Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
170899 |
1 |
|
|
T1 |
732 |
|
T3 |
105 |
|
T7 |
285 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
88495 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
61350 |
1 |
|
|
T1 |
721 |
|
T3 |
103 |
|
T7 |
281 |
seven_bytes |
3078 |
1 |
|
|
T20 |
29 |
|
T21 |
85 |
|
T22 |
40 |
six_bytes |
3092 |
1 |
|
|
T20 |
29 |
|
T21 |
70 |
|
T22 |
35 |
five_bytes |
2964 |
1 |
|
|
T20 |
40 |
|
T21 |
73 |
|
T22 |
35 |
four_bytes |
2971 |
1 |
|
|
T20 |
39 |
|
T21 |
91 |
|
T22 |
36 |
three_bytes |
3072 |
1 |
|
|
T20 |
42 |
|
T21 |
81 |
|
T22 |
35 |
two_bytes |
2888 |
1 |
|
|
T20 |
29 |
|
T21 |
68 |
|
T22 |
42 |
one_byte |
2989 |
1 |
|
|
T20 |
34 |
|
T21 |
72 |
|
T22 |
40 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
167607 |
1 |
|
|
T1 |
710 |
|
T3 |
101 |
|
T7 |
277 |
auto[1] |
3292 |
1 |
|
|
T1 |
22 |
|
T3 |
4 |
|
T7 |
8 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
170899 |
1 |
|
|
T1 |
732 |
|
T3 |
105 |
|
T7 |
285 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
170886 |
1 |
|
|
T1 |
732 |
|
T3 |
105 |
|
T7 |
285 |
auto[1] |
13 |
1 |
|
|
T178 |
1 |
|
T179 |
1 |
|
T180 |
2 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1152 |
1 |
|
|
T1 |
11 |
|
T3 |
2 |
|
T7 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3292 |
1 |
|
|
T1 |
22 |
|
T3 |
4 |
|
T7 |
8 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
157283 |
1 |
|
|
T1 |
889 |
|
T7 |
131 |
|
T20 |
1460 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
76224 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
63036 |
1 |
|
|
T1 |
872 |
|
T7 |
129 |
|
T20 |
32 |
seven_bytes |
2657 |
1 |
|
|
T20 |
39 |
|
T21 |
42 |
|
T22 |
60 |
six_bytes |
2573 |
1 |
|
|
T20 |
49 |
|
T21 |
39 |
|
T22 |
50 |
five_bytes |
2604 |
1 |
|
|
T20 |
41 |
|
T21 |
26 |
|
T22 |
52 |
four_bytes |
2608 |
1 |
|
|
T20 |
30 |
|
T21 |
41 |
|
T22 |
45 |
three_bytes |
2546 |
1 |
|
|
T20 |
36 |
|
T21 |
27 |
|
T22 |
44 |
two_bytes |
2526 |
1 |
|
|
T20 |
44 |
|
T21 |
37 |
|
T22 |
52 |
one_byte |
2509 |
1 |
|
|
T20 |
37 |
|
T21 |
28 |
|
T22 |
54 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
154097 |
1 |
|
|
T1 |
855 |
|
T7 |
127 |
|
T20 |
1440 |
auto[1] |
3186 |
1 |
|
|
T1 |
34 |
|
T7 |
4 |
|
T20 |
20 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
157283 |
1 |
|
|
T1 |
889 |
|
T7 |
131 |
|
T20 |
1460 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
157272 |
1 |
|
|
T1 |
889 |
|
T7 |
131 |
|
T20 |
1460 |
auto[1] |
11 |
1 |
|
|
T19 |
1 |
|
T181 |
1 |
|
T182 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1137 |
1 |
|
|
T1 |
17 |
|
T7 |
2 |
|
T20 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3186 |
1 |
|
|
T1 |
34 |
|
T7 |
4 |
|
T20 |
20 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
317175 |
1 |
|
|
T1 |
1816 |
|
T3 |
48 |
|
T7 |
719 |
auto[1] |
596 |
1 |
|
|
T8 |
62 |
|
T9 |
13 |
|
T10 |
29 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
161375 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
118260 |
1 |
|
|
T1 |
1789 |
|
T3 |
47 |
|
T7 |
706 |
seven_bytes |
5461 |
1 |
|
|
T20 |
56 |
|
T21 |
57 |
|
T22 |
62 |
six_bytes |
5515 |
1 |
|
|
T20 |
58 |
|
T21 |
56 |
|
T22 |
76 |
five_bytes |
5553 |
1 |
|
|
T20 |
45 |
|
T21 |
57 |
|
T22 |
70 |
four_bytes |
5449 |
1 |
|
|
T20 |
34 |
|
T21 |
72 |
|
T22 |
54 |
three_bytes |
5299 |
1 |
|
|
T20 |
38 |
|
T21 |
74 |
|
T22 |
63 |
two_bytes |
5439 |
1 |
|
|
T20 |
43 |
|
T21 |
54 |
|
T22 |
63 |
one_byte |
5420 |
1 |
|
|
T20 |
42 |
|
T21 |
62 |
|
T22 |
55 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
311511 |
1 |
|
|
T1 |
1762 |
|
T3 |
46 |
|
T7 |
693 |
auto[1] |
6260 |
1 |
|
|
T1 |
54 |
|
T3 |
2 |
|
T7 |
26 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
317771 |
1 |
|
|
T1 |
1816 |
|
T3 |
48 |
|
T7 |
719 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
317747 |
1 |
|
|
T1 |
1816 |
|
T3 |
48 |
|
T7 |
719 |
auto[1] |
24 |
1 |
|
|
T68 |
1 |
|
T108 |
1 |
|
T55 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2196 |
1 |
|
|
T1 |
27 |
|
T3 |
1 |
|
T7 |
13 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6260 |
1 |
|
|
T1 |
54 |
|
T3 |
2 |
|
T7 |
26 |