Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 256683256 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 182366057 1 T1 70687 T2 45065 T3 7104



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 227843733 1 T1 94379 T2 53663 T3 9702
values[0x0] 101561397 1 T1 18474 T2 18153 T3 2185
values[0x1] 109644183 1 T1 19823 T2 17966 T3 2193



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 199580226 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 239469087 1 T1 86441 T2 56475 T3 8919



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1457298 1 T1 518 T2 360 T3 2
valid_sources[0x01] 4016219 1 T1 570 T2 346 T3 3
valid_sources[0x02] 1366754 1 T1 508 T2 344 T3 2
valid_sources[0x03] 2026581 1 T1 557 T2 343 T3 2
valid_sources[0x04] 1361515 1 T1 510 T2 339 T3 3
valid_sources[0x05] 1371659 1 T1 563 T2 349 T3 3
valid_sources[0x06] 1375154 1 T1 502 T2 363 T3 3
valid_sources[0x07] 1360623 1 T1 523 T2 329 T3 2
valid_sources[0x08] 1369673 1 T1 508 T2 362 T7 168
valid_sources[0x09] 1370186 1 T1 477 T2 353 T3 3
valid_sources[0x0a] 1972939 1 T1 529 T2 364 T3 3
valid_sources[0x0b] 1885266 1 T1 517 T2 339 T3 1
valid_sources[0x0c] 3697419 1 T1 538 T2 349 T7 185
valid_sources[0x0d] 1363658 1 T1 500 T2 319 T7 164
valid_sources[0x0e] 1367216 1 T1 520 T2 361 T3 1
valid_sources[0x0f] 1464495 1 T1 481 T2 346 T3 2
valid_sources[0x10] 1377217 1 T1 484 T2 331 T7 163
valid_sources[0x11] 1364811 1 T1 493 T2 327 T3 2
valid_sources[0x12] 1369416 1 T1 506 T2 342 T7 186
valid_sources[0x13] 1366200 1 T1 515 T2 344 T3 3
valid_sources[0x14] 1367705 1 T1 478 T2 323 T3 1
valid_sources[0x15] 1367471 1 T1 496 T2 368 T3 1
valid_sources[0x16] 1363665 1 T1 506 T2 359 T3 1
valid_sources[0x17] 1554439 1 T1 526 T2 348 T3 4
valid_sources[0x18] 1366081 1 T1 472 T2 341 T3 2
valid_sources[0x19] 1371177 1 T1 596 T2 289 T3 3
valid_sources[0x1a] 3300709 1 T1 521 T2 372 T7 189
valid_sources[0x1b] 1453970 1 T1 571 T2 330 T7 158
valid_sources[0x1c] 1366618 1 T1 539 T2 360 T7 158
valid_sources[0x1d] 1370466 1 T1 526 T2 370 T7 176
valid_sources[0x1e] 1417337 1 T1 538 T2 354 T3 1
valid_sources[0x1f] 3361899 1 T1 548 T2 351 T3 1
valid_sources[0x20] 1365534 1 T1 502 T2 365 T3 1
valid_sources[0x21] 1363742 1 T1 511 T2 355 T3 1
valid_sources[0x22] 2123318 1 T1 521 T2 357 T3 2
valid_sources[0x23] 1981293 1 T1 547 T2 360 T3 2
valid_sources[0x24] 1515939 1 T1 503 T2 344 T3 1
valid_sources[0x25] 1432618 1 T1 510 T2 395 T7 166
valid_sources[0x26] 1363563 1 T1 536 T2 373 T3 1
valid_sources[0x27] 1359153 1 T1 540 T2 362 T3 1
valid_sources[0x28] 1826453 1 T1 520 T2 382 T3 2
valid_sources[0x29] 1443507 1 T1 499 T2 329 T3 1
valid_sources[0x2a] 1798332 1 T1 491 T2 328 T7 140
valid_sources[0x2b] 1371394 1 T1 523 T2 334 T7 162
valid_sources[0x2c] 1530800 1 T1 500 T2 344 T3 1
valid_sources[0x2d] 1957828 1 T1 488 T2 330 T3 1
valid_sources[0x2e] 1365903 1 T1 479 T2 380 T7 170
valid_sources[0x2f] 1366029 1 T1 524 T2 391 T7 161
valid_sources[0x30] 1362306 1 T1 538 T2 388 T3 3
valid_sources[0x31] 1381251 1 T1 520 T2 364 T3 2
valid_sources[0x32] 1433065 1 T1 501 T2 345 T7 152
valid_sources[0x33] 1517743 1 T1 527 T2 365 T3 1
valid_sources[0x34] 1367847 1 T1 534 T2 376 T7 176
valid_sources[0x35] 1365658 1 T1 533 T2 382 T3 3
valid_sources[0x36] 2014072 1 T1 592 T2 301 T7 192
valid_sources[0x37] 1371244 1 T1 514 T2 340 T3 3
valid_sources[0x38] 3739718 1 T1 512 T2 372 T3 1
valid_sources[0x39] 1360955 1 T1 504 T2 340 T3 2
valid_sources[0x3a] 1390212 1 T1 466 T2 325 T3 1
valid_sources[0x3b] 1436869 1 T1 466 T2 346 T3 2
valid_sources[0x3c] 1357767 1 T1 547 T2 368 T3 1
valid_sources[0x3d] 1398522 1 T1 503 T2 320 T3 1
valid_sources[0x3e] 1358021 1 T1 508 T2 332 T7 171
valid_sources[0x3f] 1375841 1 T1 550 T2 350 T3 3
valid_sources[0x40] 1367178 1 T1 487 T2 343 T3 5
valid_sources[0x41] 1363366 1 T1 493 T2 332 T7 169
valid_sources[0x42] 1361585 1 T1 515 T2 318 T7 169
valid_sources[0x43] 1357573 1 T1 534 T2 379 T3 3
valid_sources[0x44] 1355994 1 T1 480 T2 375 T3 2
valid_sources[0x45] 1364415 1 T1 486 T2 345 T3 1
valid_sources[0x46] 1368029 1 T1 532 T2 353 T7 154
valid_sources[0x47] 2023128 1 T1 571 T2 383 T3 3
valid_sources[0x48] 1364174 1 T1 530 T2 347 T3 1
valid_sources[0x49] 1368329 1 T1 550 T2 340 T3 1
valid_sources[0x4a] 1369325 1 T1 483 T2 356 T7 152
valid_sources[0x4b] 1370504 1 T1 554 T2 370 T7 137
valid_sources[0x4c] 1369485 1 T1 510 T2 365 T3 4
valid_sources[0x4d] 1364830 1 T1 505 T2 333 T3 1
valid_sources[0x4e] 1369467 1 T1 467 T2 339 T7 185
valid_sources[0x4f] 1455646 1 T1 522 T2 354 T3 4
valid_sources[0x50] 1359908 1 T1 498 T2 369 T3 4
valid_sources[0x51] 1821581 1 T1 515 T2 332 T3 2
valid_sources[0x52] 1364118 1 T1 511 T2 365 T3 2
valid_sources[0x53] 1364234 1 T1 482 T2 369 T3 1
valid_sources[0x54] 1523538 1 T1 522 T2 361 T3 1
valid_sources[0x55] 3744921 1 T1 568 T2 333 T3 3
valid_sources[0x56] 1372757 1 T1 494 T2 373 T7 190
valid_sources[0x57] 1367459 1 T1 526 T2 336 T3 1
valid_sources[0x58] 1497676 1 T1 546 T2 355 T7 185
valid_sources[0x59] 2285059 1 T1 499 T2 323 T3 1
valid_sources[0x5a] 1363776 1 T1 470 T2 364 T3 1
valid_sources[0x5b] 1366486 1 T1 484 T2 372 T3 1
valid_sources[0x5c] 1364824 1 T1 588 T2 346 T7 189
valid_sources[0x5d] 2002400 1 T1 505 T2 351 T3 1
valid_sources[0x5e] 1370182 1 T1 541 T2 370 T3 3
valid_sources[0x5f] 1364949 1 T1 547 T2 331 T3 1
valid_sources[0x60] 1810498 1 T1 521 T2 357 T3 1
valid_sources[0x61] 1366256 1 T1 504 T2 315 T7 159
valid_sources[0x62] 1363859 1 T1 540 T2 330 T3 2
valid_sources[0x63] 2645388 1 T1 513 T2 355 T3 2
valid_sources[0x64] 2485214 1 T1 494 T2 345 T3 1
valid_sources[0x65] 1371084 1 T1 536 T2 335 T7 179
valid_sources[0x66] 2008075 1 T1 507 T2 322 T3 1
valid_sources[0x67] 3313297 1 T1 515 T2 345 T7 153
valid_sources[0x68] 1362058 1 T1 528 T2 325 T7 176
valid_sources[0x69] 1370362 1 T1 537 T2 315 T3 3
valid_sources[0x6a] 1367805 1 T1 494 T2 366 T3 2
valid_sources[0x6b] 1608264 1 T1 523 T2 372 T3 3
valid_sources[0x6c] 2035278 1 T1 547 T2 367 T3 1
valid_sources[0x6d] 1365424 1 T1 515 T2 359 T7 182
valid_sources[0x6e] 1370698 1 T1 535 T2 342 T3 1
valid_sources[0x6f] 1367016 1 T1 488 T2 354 T3 1
valid_sources[0x70] 1363780 1 T1 535 T2 305 T7 155
valid_sources[0x71] 3357746 1 T1 500 T2 380 T7 171
valid_sources[0x72] 1365381 1 T1 544 T2 386 T3 2
valid_sources[0x73] 1416023 1 T1 504 T2 372 T3 1
valid_sources[0x74] 1365680 1 T1 499 T2 374 T3 1
valid_sources[0x75] 1820733 1 T1 521 T2 354 T3 3
valid_sources[0x76] 1465607 1 T1 481 T2 335 T3 2
valid_sources[0x77] 1774522 1 T1 523 T2 360 T3 1
valid_sources[0x78] 1372147 1 T1 520 T2 315 T3 2
valid_sources[0x79] 2274009 1 T1 551 T2 345 T3 2
valid_sources[0x7a] 1368110 1 T1 499 T2 331 T3 1
valid_sources[0x7b] 2223176 1 T1 538 T2 360 T7 174
valid_sources[0x7c] 1358480 1 T1 546 T2 360 T3 1
valid_sources[0x7d] 2405719 1 T1 547 T2 352 T3 2
valid_sources[0x7e] 1366891 1 T1 540 T2 343 T3 1
valid_sources[0x7f] 1365898 1 T1 545 T2 293 T3 2
valid_sources[0x80] 1358432 1 T1 516 T2 339 T3 2



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 70519202 1 T1 49253 T2 9563 T3 4684
values[0x0] all_enables biggest_size 60097589 1 T1 11443 T2 17847 T3 1364
values[0x1] all_enables biggest_size 51749266 1 T1 9991 T2 17655 T3 1056

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%