Group : kmac_env_pkg::app_cg_wrap::app_cg
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Group : kmac_env_pkg::app_cg_wrap::app_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
94.44 90.74 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

3 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
AppLc_cg 88.89 1 100 1 64 64
AppRom_cg 88.89 1 100 1 64 64
AppKeymgr_cg 94.44 1 100 1 64 64




Group Instance : AppLc_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
88.89 1 100 1 64 64




Summary for Group Instance AppLc_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 16 2 14 87.50
Crosses 2 0 2 100.00


Variables for Group Instance AppLc_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
app_err 2 1 1 50.00 100 1 1 2
data_strb 8 0 8 100.00 100 1 1 0
done 2 0 2 100.00 100 1 1 2
in_keccak_rounds 2 1 1 50.00 100 1 1 2
single_data_beat 2 0 2 100.00 100 1 1 2


Crosses for Group Instance AppLc_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
partial_data_on_last_beat 1 0 1 100.00 100 1 1 0
done_in_keccak_rounds 1 0 1 100.00 100 1 1 0



Group Instance : AppRom_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
88.89 1 100 1 64 64




Summary for Group Instance AppRom_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 16 2 14 87.50
Crosses 2 0 2 100.00


Variables for Group Instance AppRom_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
app_err 2 1 1 50.00 100 1 1 2
data_strb 8 0 8 100.00 100 1 1 0
done 2 0 2 100.00 100 1 1 2
in_keccak_rounds 2 1 1 50.00 100 1 1 2
single_data_beat 2 0 2 100.00 100 1 1 2


Crosses for Group Instance AppRom_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
partial_data_on_last_beat 1 0 1 100.00 100 1 1 0
done_in_keccak_rounds 1 0 1 100.00 100 1 1 0



Group Instance : AppKeymgr_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
94.44 1 100 1 64 64




Summary for Group Instance AppKeymgr_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 16 1 15 93.75
Crosses 2 0 2 100.00


Variables for Group Instance AppKeymgr_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
app_err 2 0 2 100.00 100 1 1 2
data_strb 8 0 8 100.00 100 1 1 0
done 2 0 2 100.00 100 1 1 2
in_keccak_rounds 2 1 1 50.00 100 1 1 2
single_data_beat 2 0 2 100.00 100 1 1 2


Crosses for Group Instance AppKeymgr_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
partial_data_on_last_beat 1 0 1 100.00 100 1 1 0
done_in_keccak_rounds 1 0 1 100.00 100 1 1 0


Summary for Variable app_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for app_err

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 178794 1 T1 167 T3 351 T7 1812



Summary for Variable data_strb

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 8 0 8 100.00


User Defined Bins for data_strb

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 92153 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
full_data_beat 64699 1 T1 165 T3 7 T7 41
seven_bytes 3107 1 T3 11 T7 56 T17 12
six_bytes 3110 1 T3 6 T7 45 T17 9
five_bytes 3190 1 T3 11 T7 40 T17 18
four_bytes 3116 1 T3 12 T7 64 T17 17
three_bytes 3189 1 T3 12 T7 45 T17 12
two_bytes 3168 1 T3 7 T7 53 T17 17
one_byte 3062 1 T3 7 T7 52 T17 22



Summary for Variable done

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for done

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 175371 1 T1 163 T3 343 T7 1790
auto[1] 3423 1 T1 4 T3 8 T7 22



Summary for Variable in_keccak_rounds

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for in_keccak_rounds

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 178794 1 T1 167 T3 351 T7 1812



Summary for Variable single_data_beat

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for single_data_beat

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 178790 1 T1 167 T3 351 T7 1812
auto[1] 4 1 T8 1 T59 1 T181 1



Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
User Defined Cross Bins 1 0 1 100.00


User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid 1185 1 T1 2 T3 1 T7 1



Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
User Defined Cross Bins 1 0 1 100.00


User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid 3423 1 T1 4 T3 8 T7 22


Summary for Variable app_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for app_err

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 177840 1 T1 50 T3 406 T7 1095



Summary for Variable data_strb

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 8 0 8 100.00


User Defined Bins for data_strb

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 94428 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
full_data_beat 60701 1 T1 49 T3 19 T7 24
seven_bytes 3290 1 T3 10 T7 30 T17 6
six_bytes 3273 1 T3 12 T7 24 T17 3
five_bytes 3247 1 T3 15 T7 31 T17 5
four_bytes 3215 1 T3 7 T7 32 T17 2
three_bytes 3161 1 T3 13 T7 25 T17 7
two_bytes 3212 1 T3 8 T7 31 T17 7
one_byte 3313 1 T3 8 T7 26 T17 5



Summary for Variable done

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for done

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 174512 1 T1 48 T3 396 T7 1075
auto[1] 3328 1 T1 2 T3 10 T7 20



Summary for Variable in_keccak_rounds

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for in_keccak_rounds

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 177840 1 T1 50 T3 406 T7 1095



Summary for Variable single_data_beat

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for single_data_beat

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 177824 1 T1 50 T3 406 T7 1094
auto[1] 16 1 T7 1 T82 1 T83 1



Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
User Defined Cross Bins 1 0 1 100.00


User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid 1125 1 T1 1 T3 3 T7 2



Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
User Defined Cross Bins 1 0 1 100.00


User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid 3328 1 T1 2 T3 10 T7 20


Summary for Variable app_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for app_err

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 356877 1 T1 315 T3 532 T7 5450
auto[1] 556 1 T8 77 T9 61 T10 7



Summary for Variable data_strb

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 8 0 8 100.00


User Defined Bins for data_strb

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 191634 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
full_data_beat 120235 1 T1 310 T3 14 T7 157
seven_bytes 6536 1 T3 16 T7 134 T17 9
six_bytes 6590 1 T3 17 T7 153 T17 8
five_bytes 6473 1 T3 9 T7 139 T17 9
four_bytes 6469 1 T3 14 T7 133 T17 7
three_bytes 6559 1 T3 15 T7 145 T17 13
two_bytes 6488 1 T3 14 T7 145 T17 19
one_byte 6449 1 T3 14 T7 136 T17 16



Summary for Variable done

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for done

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 350713 1 T1 305 T3 524 T7 5380
auto[1] 6720 1 T1 10 T3 8 T7 70



Summary for Variable in_keccak_rounds

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for in_keccak_rounds

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 357433 1 T1 315 T3 532 T7 5450



Summary for Variable single_data_beat

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for single_data_beat

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 357408 1 T1 315 T3 532 T7 5449
auto[1] 25 1 T7 1 T9 2 T57 1



Summary for Cross partial_data_on_last_beat

Samples crossed: done data_strb
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
User Defined Cross Bins 1 0 1 100.00


User Defined Cross Bins for partial_data_on_last_beat

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid 2301 1 T1 5 T3 1 T7 15



Summary for Cross done_in_keccak_rounds

Samples crossed: done in_keccak_rounds
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
User Defined Cross Bins 1 0 1 100.00


User Defined Cross Bins for done_in_keccak_rounds

Excluded/Illegal bins
NAMECOUNTSTATUS
invalid 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid 6720 1 T1 10 T3 8 T7 70

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%