Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	154025150	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

114642525

1

T1

406

T2

13974

T3

73099

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	140448114	1			T1	456		T2	16732		T3	81919
values[0x0]	61692482	1			T1	205		T2	4007		T3	21090
values[0x1]	66527079	1			T1	205		T2	4383		T3	22785

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	119514698	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

149152977

1

T1

557

T2

16802

T3

85366

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	761704	1			T1	4		T2	26		T3	518
valid_sources[0x01]	758764	1			T1	1		T2	91		T3	531
valid_sources[0x02]	761629	1			T1	2		T2	89		T3	452
valid_sources[0x03]	799823	1			T1	3		T2	86		T3	473
valid_sources[0x04]	2328957	1			T1	2		T2	121		T3	484
valid_sources[0x05]	1411705	1			T1	3		T2	55		T3	478
valid_sources[0x06]	760394	1			T1	4		T2	70		T3	430
valid_sources[0x07]	3208154	1			T1	2		T2	89		T3	472
valid_sources[0x08]	3075067	1			T2	58		T3	501		T15	688
valid_sources[0x09]	812264	1			T1	1		T2	91		T3	488
valid_sources[0x0a]	788500	1			T1	3		T2	137		T3	493
valid_sources[0x0b]	763395	1			T1	7		T2	72		T3	525
valid_sources[0x0c]	760750	1			T1	6		T2	76		T3	511
valid_sources[0x0d]	764779	1			T1	9		T2	155		T3	532
valid_sources[0x0e]	822342	1			T1	5		T2	90		T3	503
valid_sources[0x0f]	1223520	1			T1	4		T2	68		T3	481
valid_sources[0x10]	757589	1			T1	1		T2	74		T3	507
valid_sources[0x11]	802287	1			T1	4		T2	101		T3	500
valid_sources[0x12]	3103829	1			T1	4		T2	105		T3	521
valid_sources[0x13]	757732	1			T1	10		T2	90		T3	498
valid_sources[0x14]	792901	1			T1	9		T2	105		T3	497
valid_sources[0x15]	2974464	1			T1	2		T2	108		T3	532
valid_sources[0x16]	3107610	1			T1	1		T2	114		T3	508
valid_sources[0x17]	768938	1			T1	9		T2	163		T3	452
valid_sources[0x18]	763967	1			T1	3		T2	95		T3	454
valid_sources[0x19]	918069	1			T1	1		T2	133		T3	486
valid_sources[0x1a]	2322808	1			T1	5		T2	105		T3	450
valid_sources[0x1b]	761042	1			T1	2		T2	171		T3	482
valid_sources[0x1c]	765998	1			T1	8		T2	46		T3	514
valid_sources[0x1d]	1660960	1			T2	98		T3	485		T15	668
valid_sources[0x1e]	766925	1			T1	4		T2	97		T3	459
valid_sources[0x1f]	760299	1			T1	5		T2	101		T3	463
valid_sources[0x20]	757021	1			T1	1		T2	66		T3	492
valid_sources[0x21]	760367	1			T1	2		T2	105		T3	483
valid_sources[0x22]	2072103	1			T1	5		T2	71		T3	516
valid_sources[0x23]	781873	1			T1	2		T2	53		T3	496
valid_sources[0x24]	764790	1			T1	3		T2	90		T3	484
valid_sources[0x25]	763295	1			T1	2		T2	46		T3	473
valid_sources[0x26]	1671300	1			T1	8		T2	50		T3	495
valid_sources[0x27]	1066098	1			T1	2		T2	109		T3	512
valid_sources[0x28]	1559298	1			T1	3		T2	46		T3	481
valid_sources[0x29]	761834	1			T1	5		T2	37		T3	514
valid_sources[0x2a]	1217914	1			T1	4		T2	89		T3	492
valid_sources[0x2b]	755823	1			T1	2		T2	81		T3	474
valid_sources[0x2c]	758769	1			T1	12		T2	139		T3	532
valid_sources[0x2d]	767765	1			T1	1		T2	117		T3	486
valid_sources[0x2e]	783859	1			T2	124		T3	540		T15	688
valid_sources[0x2f]	913869	1			T1	4		T2	101		T3	470
valid_sources[0x30]	766366	1			T1	4		T2	48		T3	496
valid_sources[0x31]	911573	1			T1	3		T2	159		T3	448
valid_sources[0x32]	757662	1			T1	1		T2	90		T3	473
valid_sources[0x33]	837898	1			T1	1		T2	142		T3	487
valid_sources[0x34]	762399	1			T1	2		T2	78		T3	466
valid_sources[0x35]	2127553	1			T1	6		T2	173		T3	483
valid_sources[0x36]	1627873	1			T2	141		T3	499		T15	722
valid_sources[0x37]	1422802	1			T2	59		T3	493		T15	684
valid_sources[0x38]	763213	1			T1	1		T2	110		T3	458
valid_sources[0x39]	765766	1			T1	4		T2	69		T3	477
valid_sources[0x3a]	759971	1			T2	70		T3	468		T15	662
valid_sources[0x3b]	1643316	1			T1	7		T2	117		T3	472
valid_sources[0x3c]	755113	1			T1	4		T2	64		T3	439
valid_sources[0x3d]	843300	1			T1	3		T2	92		T3	517
valid_sources[0x3e]	759500	1			T1	5		T2	40		T3	488
valid_sources[0x3f]	1397660	1			T1	1		T2	164		T3	524
valid_sources[0x40]	757297	1			T1	5		T2	108		T3	520
valid_sources[0x41]	762663	1			T1	5		T2	69		T3	478
valid_sources[0x42]	764466	1			T1	1		T2	126		T3	475
valid_sources[0x43]	762162	1			T1	4		T2	84		T3	501
valid_sources[0x44]	2093739	1			T1	3		T2	90		T3	507
valid_sources[0x45]	1837568	1			T2	68		T3	486		T15	643
valid_sources[0x46]	781964	1			T1	1		T2	54		T3	490
valid_sources[0x47]	759098	1			T1	3		T2	144		T3	476
valid_sources[0x48]	898967	1			T1	2		T2	156		T3	543
valid_sources[0x49]	758384	1			T1	2		T2	66		T3	486
valid_sources[0x4a]	763533	1			T1	1		T2	88		T3	491
valid_sources[0x4b]	762041	1			T1	3		T2	81		T3	510
valid_sources[0x4c]	763125	1			T1	4		T2	103		T3	477
valid_sources[0x4d]	1634930	1			T1	1		T2	69		T3	464
valid_sources[0x4e]	2162993	1			T1	4		T2	141		T3	548
valid_sources[0x4f]	2778193	1			T1	1		T2	73		T3	508
valid_sources[0x50]	944552	1			T1	3		T2	87		T3	499
valid_sources[0x51]	1005303	1			T1	3		T2	153		T3	472
valid_sources[0x52]	768195	1			T1	8		T2	134		T3	491
valid_sources[0x53]	760539	1			T1	2		T2	144		T3	512
valid_sources[0x54]	760005	1			T1	5		T2	84		T3	540
valid_sources[0x55]	760148	1			T1	1		T2	79		T3	463
valid_sources[0x56]	2713520	1			T1	3		T2	105		T3	523
valid_sources[0x57]	1683622	1			T1	4		T2	96		T3	502
valid_sources[0x58]	792847	1			T1	1		T2	63		T3	522
valid_sources[0x59]	760815	1			T1	4		T2	58		T3	504
valid_sources[0x5a]	1150759	1			T1	1		T2	84		T3	502
valid_sources[0x5b]	758633	1			T1	4		T2	119		T3	514
valid_sources[0x5c]	1618777	1			T1	2		T2	56		T3	455
valid_sources[0x5d]	761782	1			T1	5		T2	82		T3	476
valid_sources[0x5e]	764163	1			T1	7		T2	77		T3	523
valid_sources[0x5f]	1373072	1			T1	5		T2	209		T3	502
valid_sources[0x60]	1667908	1			T1	3		T2	110		T3	503
valid_sources[0x61]	766302	1			T1	5		T2	89		T3	504
valid_sources[0x62]	1464645	1			T1	3		T2	61		T3	541
valid_sources[0x63]	762629	1			T1	1		T2	118		T3	482
valid_sources[0x64]	1671885	1			T1	2		T2	102		T3	484
valid_sources[0x65]	767886	1			T1	5		T2	73		T3	503
valid_sources[0x66]	767829	1			T1	4		T2	161		T3	486
valid_sources[0x67]	863984	1			T1	1		T2	88		T3	497
valid_sources[0x68]	763871	1			T1	2		T2	84		T3	466
valid_sources[0x69]	822907	1			T1	1		T2	109		T3	480
valid_sources[0x6a]	759986	1			T1	6		T2	127		T3	515
valid_sources[0x6b]	759406	1			T1	8		T2	147		T3	487
valid_sources[0x6c]	1664086	1			T1	7		T2	144		T3	482
valid_sources[0x6d]	762075	1			T1	4		T2	158		T3	466
valid_sources[0x6e]	1149692	1			T1	3		T2	63		T3	469
valid_sources[0x6f]	772510	1			T1	3		T2	55		T3	526
valid_sources[0x70]	1617378	1			T1	3		T2	91		T3	448
valid_sources[0x71]	758956	1			T1	3		T2	123		T3	500
valid_sources[0x72]	766757	1			T1	2		T2	80		T3	507
valid_sources[0x73]	788291	1			T1	3		T2	48		T3	484
valid_sources[0x74]	761306	1			T1	4		T2	51		T3	484
valid_sources[0x75]	2795329	1			T1	3		T2	68		T3	468
valid_sources[0x76]	765047	1			T1	4		T2	127		T3	500
valid_sources[0x77]	2027275	1			T1	7		T2	173		T3	481
valid_sources[0x78]	910923	1			T1	4		T2	88		T3	452
valid_sources[0x79]	762331	1			T1	4		T2	129		T3	465
valid_sources[0x7a]	1408650	1			T1	4		T2	45		T3	512
valid_sources[0x7b]	770294	1			T1	3		T2	66		T3	460
valid_sources[0x7c]	764827	1			T1	2		T2	83		T3	477
valid_sources[0x7d]	764336	1			T1	4		T2	85		T3	497
valid_sources[0x7e]	765186	1			T1	1		T2	153		T3	515
valid_sources[0x7f]	783780	1			T1	5		T2	128		T3	507
valid_sources[0x80]	759939	1			T1	5		T2	100		T3	504

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

44915522

1

T1

13

T2

9419

T3

49043

values[0x0]

all_enables

biggest_size

37311346

1

T1

196

T2

2402

T3

12831

values[0x1]

all_enables

biggest_size

32415657

1

T1

197

T2

2153

T3

11225