Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	4704	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	5839	1			T1	18		T31	27		T7	9
len_5001_7500	10675	1			T1	49		T30	33		T31	67
len_2501_5000	6427	1			T1	5		T30	34		T31	19
len_1025_2500	3818	1			T1	8		T30	20		T31	2
len_769_1024	5772	1			T1	19		T2	4		T15	2
len_513_768	6230	1			T1	26		T2	5		T15	2
len_257_512	10081	1			T1	23		T2	5		T30	4
len_0_256	115182	1			T1	83		T2	7		T30	148
len_keccak_block_sizes[72]	470	1			T30	2		T20	1		T35	2
len_keccak_block_sizes[104]	369	1			T101	2		T102	2		T77	2
len_keccak_block_sizes[136]	265	1			T101	2		T188	3		T32	1
len_keccak_block_sizes[144]	188	1			T16	1		T188	3		T189	3
len_keccak_block_sizes[168]	116	1			T19	1		T20	1		T188	3
len_1	499	1			T30	2		T35	2		T101	2
len_0	842	1			T1	10		T30	2		T31	3