Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	5649	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	6109	1			T17	19		T33	19		T14	26
len_5001_7500	10340	1			T17	18		T33	18		T14	50
len_2501_5000	6748	1			T17	18		T33	18		T14	13
len_1025_2500	3924	1			T17	11		T33	11		T14	8
len_769_1024	5977	1			T3	7		T17	2		T7	4
len_513_768	6519	1			T3	10		T17	2		T7	4
len_257_512	11553	1			T2	1		T3	15		T17	2
len_0_256	139976	1			T3	4		T17	274		T33	274
len_keccak_block_sizes[72]	518	1			T17	2		T33	2		T14	1
len_keccak_block_sizes[104]	408	1			T17	2		T33	2		T8	1
len_keccak_block_sizes[136]	312	1			T17	2		T33	2		T34	2
len_keccak_block_sizes[144]	227	1			T34	2		T21	1		T35	3
len_keccak_block_sizes[168]	150	1			T35	3		T82	3		T193	3
len_1	552	1			T17	2		T33	2		T34	2
len_0	945	1			T17	2		T33	2		T14	8