Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	600	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5051	1			T3	3		T7	1		T8	11
len_601_800	11278	1			T3	16		T7	6		T8	27
len_401_600	7416	1			T2	1		T3	8		T7	1
len_201_400	10069	1			T3	4		T8	10		T14	40
len_65_200	34035	1			T3	2		T7	3		T8	3
len_min_for_xof_require_squeeze	450	1			T14	1		T21	1		T35	10
len_keccak_block_sizes[72]	323	1			T35	5		T82	9		T193	5
len_keccak_block_sizes[104]	327	1			T35	5		T82	9		T193	5
len_keccak_block_sizes[136]	338	1			T35	5		T82	9		T151	1
len_keccak_block_sizes[144]	169	1			T35	5		T193	5		T114	5
len_keccak_block_sizes[168]	164	1			T14	1		T35	5		T36	1
len_datapath_width	13664	1			T14	14		T35	5		T56	3
len_2_63	120007	1			T2	1		T3	1		T17	374
len_1	40	1			T14	1		T116	1		T194	1