Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171167 |
1 |
|
|
T8 |
1054 |
|
T9 |
888 |
|
T15 |
1383 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
90185 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
59437 |
1 |
|
|
T8 |
436 |
|
T9 |
871 |
|
T15 |
603 |
seven_bytes |
3159 |
1 |
|
|
T8 |
22 |
|
T15 |
18 |
|
T19 |
56 |
six_bytes |
3081 |
1 |
|
|
T8 |
14 |
|
T15 |
27 |
|
T19 |
74 |
five_bytes |
3062 |
1 |
|
|
T8 |
20 |
|
T15 |
27 |
|
T19 |
82 |
four_bytes |
3029 |
1 |
|
|
T8 |
17 |
|
T15 |
13 |
|
T19 |
68 |
three_bytes |
3175 |
1 |
|
|
T8 |
22 |
|
T15 |
30 |
|
T19 |
64 |
two_bytes |
2953 |
1 |
|
|
T8 |
13 |
|
T15 |
28 |
|
T19 |
59 |
one_byte |
3086 |
1 |
|
|
T8 |
21 |
|
T15 |
22 |
|
T19 |
70 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
167923 |
1 |
|
|
T8 |
1036 |
|
T9 |
854 |
|
T15 |
1363 |
auto[1] |
3244 |
1 |
|
|
T8 |
18 |
|
T9 |
34 |
|
T15 |
20 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171167 |
1 |
|
|
T8 |
1054 |
|
T9 |
888 |
|
T15 |
1383 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171152 |
1 |
|
|
T8 |
1054 |
|
T9 |
888 |
|
T15 |
1383 |
auto[1] |
15 |
1 |
|
|
T137 |
1 |
|
T168 |
1 |
|
T10 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1106 |
1 |
|
|
T8 |
5 |
|
T9 |
17 |
|
T15 |
9 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3244 |
1 |
|
|
T8 |
18 |
|
T9 |
34 |
|
T15 |
20 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
179511 |
1 |
|
|
T7 |
68 |
|
T8 |
1486 |
|
T9 |
708 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
97868 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
58205 |
1 |
|
|
T7 |
1 |
|
T8 |
568 |
|
T9 |
697 |
seven_bytes |
3315 |
1 |
|
|
T8 |
23 |
|
T19 |
29 |
|
T169 |
6 |
six_bytes |
3318 |
1 |
|
|
T7 |
2 |
|
T8 |
29 |
|
T19 |
31 |
five_bytes |
3374 |
1 |
|
|
T7 |
3 |
|
T8 |
20 |
|
T19 |
30 |
four_bytes |
3365 |
1 |
|
|
T7 |
3 |
|
T8 |
22 |
|
T19 |
29 |
three_bytes |
3364 |
1 |
|
|
T7 |
1 |
|
T8 |
34 |
|
T19 |
36 |
two_bytes |
3397 |
1 |
|
|
T7 |
3 |
|
T8 |
24 |
|
T19 |
45 |
one_byte |
3305 |
1 |
|
|
T7 |
2 |
|
T8 |
14 |
|
T19 |
21 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
176159 |
1 |
|
|
T7 |
66 |
|
T8 |
1462 |
|
T9 |
686 |
auto[1] |
3352 |
1 |
|
|
T7 |
2 |
|
T8 |
24 |
|
T9 |
22 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
179511 |
1 |
|
|
T7 |
68 |
|
T8 |
1486 |
|
T9 |
708 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
179502 |
1 |
|
|
T7 |
68 |
|
T8 |
1486 |
|
T9 |
708 |
auto[1] |
9 |
1 |
|
|
T170 |
1 |
|
T10 |
1 |
|
T171 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1137 |
1 |
|
|
T8 |
8 |
|
T9 |
11 |
|
T15 |
9 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3352 |
1 |
|
|
T7 |
2 |
|
T8 |
24 |
|
T9 |
22 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
332727 |
1 |
|
|
T3 |
11 |
|
T7 |
642 |
|
T8 |
2354 |
auto[1] |
418 |
1 |
|
|
T10 |
56 |
|
T11 |
61 |
|
T12 |
74 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
180368 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
109811 |
1 |
|
|
T3 |
11 |
|
T7 |
18 |
|
T8 |
1167 |
seven_bytes |
6196 |
1 |
|
|
T7 |
17 |
|
T8 |
31 |
|
T15 |
31 |
six_bytes |
6203 |
1 |
|
|
T7 |
16 |
|
T8 |
37 |
|
T15 |
26 |
five_bytes |
6264 |
1 |
|
|
T7 |
14 |
|
T8 |
34 |
|
T15 |
29 |
four_bytes |
6037 |
1 |
|
|
T7 |
16 |
|
T8 |
29 |
|
T15 |
31 |
three_bytes |
6089 |
1 |
|
|
T7 |
11 |
|
T8 |
29 |
|
T15 |
28 |
two_bytes |
6083 |
1 |
|
|
T7 |
16 |
|
T8 |
36 |
|
T15 |
16 |
one_byte |
6094 |
1 |
|
|
T7 |
19 |
|
T8 |
35 |
|
T15 |
22 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
326804 |
1 |
|
|
T3 |
10 |
|
T7 |
636 |
|
T8 |
2300 |
auto[1] |
6341 |
1 |
|
|
T3 |
1 |
|
T7 |
6 |
|
T8 |
54 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
333145 |
1 |
|
|
T3 |
11 |
|
T7 |
642 |
|
T8 |
2354 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
333123 |
1 |
|
|
T3 |
11 |
|
T7 |
642 |
|
T8 |
2354 |
auto[1] |
22 |
1 |
|
|
T172 |
1 |
|
T173 |
1 |
|
T174 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2142 |
1 |
|
|
T3 |
1 |
|
T7 |
2 |
|
T8 |
21 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6341 |
1 |
|
|
T3 |
1 |
|
T7 |
6 |
|
T8 |
54 |