Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164148 |
1 |
|
|
T1 |
517 |
|
T7 |
1201 |
|
T8 |
203 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
82338 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
62238 |
1 |
|
|
T1 |
187 |
|
T7 |
871 |
|
T8 |
201 |
seven_bytes |
2883 |
1 |
|
|
T1 |
9 |
|
T7 |
8 |
|
T19 |
20 |
six_bytes |
2785 |
1 |
|
|
T1 |
4 |
|
T7 |
10 |
|
T19 |
17 |
five_bytes |
2790 |
1 |
|
|
T1 |
12 |
|
T7 |
10 |
|
T19 |
18 |
four_bytes |
2760 |
1 |
|
|
T1 |
9 |
|
T7 |
10 |
|
T19 |
14 |
three_bytes |
2773 |
1 |
|
|
T1 |
7 |
|
T7 |
9 |
|
T19 |
21 |
two_bytes |
2820 |
1 |
|
|
T1 |
9 |
|
T7 |
7 |
|
T19 |
17 |
one_byte |
2761 |
1 |
|
|
T1 |
11 |
|
T7 |
8 |
|
T19 |
16 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
160986 |
1 |
|
|
T1 |
501 |
|
T7 |
1173 |
|
T8 |
199 |
auto[1] |
3162 |
1 |
|
|
T1 |
16 |
|
T7 |
28 |
|
T8 |
4 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164148 |
1 |
|
|
T1 |
517 |
|
T7 |
1201 |
|
T8 |
203 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164133 |
1 |
|
|
T1 |
516 |
|
T7 |
1201 |
|
T8 |
203 |
auto[1] |
15 |
1 |
|
|
T1 |
1 |
|
T58 |
1 |
|
T76 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1120 |
1 |
|
|
T1 |
6 |
|
T7 |
12 |
|
T8 |
2 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3162 |
1 |
|
|
T1 |
16 |
|
T7 |
28 |
|
T8 |
4 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164212 |
1 |
|
|
T1 |
397 |
|
T7 |
996 |
|
T8 |
308 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
83695 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
60636 |
1 |
|
|
T1 |
339 |
|
T7 |
416 |
|
T8 |
304 |
seven_bytes |
2886 |
1 |
|
|
T7 |
21 |
|
T19 |
19 |
|
T37 |
2 |
six_bytes |
2919 |
1 |
|
|
T1 |
1 |
|
T7 |
14 |
|
T19 |
21 |
five_bytes |
2831 |
1 |
|
|
T1 |
1 |
|
T7 |
18 |
|
T19 |
27 |
four_bytes |
2855 |
1 |
|
|
T1 |
1 |
|
T7 |
9 |
|
T19 |
17 |
three_bytes |
2814 |
1 |
|
|
T7 |
15 |
|
T19 |
18 |
|
T17 |
9 |
two_bytes |
2720 |
1 |
|
|
T1 |
1 |
|
T7 |
19 |
|
T19 |
17 |
one_byte |
2856 |
1 |
|
|
T1 |
1 |
|
T7 |
13 |
|
T19 |
19 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
161044 |
1 |
|
|
T1 |
381 |
|
T7 |
972 |
|
T8 |
300 |
auto[1] |
3168 |
1 |
|
|
T1 |
16 |
|
T7 |
24 |
|
T8 |
8 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164212 |
1 |
|
|
T1 |
397 |
|
T7 |
996 |
|
T8 |
308 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
164198 |
1 |
|
|
T1 |
397 |
|
T7 |
996 |
|
T8 |
308 |
auto[1] |
14 |
1 |
|
|
T167 |
2 |
|
T62 |
2 |
|
T168 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1127 |
1 |
|
|
T1 |
7 |
|
T7 |
9 |
|
T8 |
4 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3168 |
1 |
|
|
T1 |
16 |
|
T7 |
24 |
|
T8 |
8 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
320249 |
1 |
|
|
T1 |
840 |
|
T7 |
3253 |
|
T8 |
576 |
auto[1] |
549 |
1 |
|
|
T6 |
27 |
|
T9 |
33 |
|
T10 |
5 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
164443 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
117620 |
1 |
|
|
T1 |
611 |
|
T7 |
1089 |
|
T8 |
569 |
seven_bytes |
5415 |
1 |
|
|
T1 |
6 |
|
T7 |
54 |
|
T19 |
40 |
six_bytes |
5612 |
1 |
|
|
T1 |
3 |
|
T7 |
63 |
|
T19 |
52 |
five_bytes |
5620 |
1 |
|
|
T1 |
3 |
|
T7 |
49 |
|
T19 |
40 |
four_bytes |
5633 |
1 |
|
|
T1 |
11 |
|
T7 |
55 |
|
T19 |
43 |
three_bytes |
5431 |
1 |
|
|
T1 |
4 |
|
T7 |
57 |
|
T19 |
43 |
two_bytes |
5533 |
1 |
|
|
T1 |
9 |
|
T7 |
51 |
|
T19 |
54 |
one_byte |
5491 |
1 |
|
|
T1 |
3 |
|
T7 |
46 |
|
T19 |
38 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
314584 |
1 |
|
|
T1 |
814 |
|
T7 |
3201 |
|
T8 |
562 |
auto[1] |
6214 |
1 |
|
|
T1 |
26 |
|
T7 |
52 |
|
T8 |
14 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
320798 |
1 |
|
|
T1 |
840 |
|
T7 |
3253 |
|
T8 |
576 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
320775 |
1 |
|
|
T1 |
840 |
|
T7 |
3253 |
|
T8 |
576 |
auto[1] |
23 |
1 |
|
|
T115 |
1 |
|
T9 |
1 |
|
T169 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2147 |
1 |
|
|
T1 |
11 |
|
T7 |
19 |
|
T8 |
7 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6214 |
1 |
|
|
T1 |
26 |
|
T7 |
52 |
|
T8 |
14 |