Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	157361771	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

116247467

1

T1

566

T2

135

T3

5599

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	143008582	1			T1	163		T2	58		T3	6231
values[0x0]	62846069	1			T1	276		T2	49		T3	1474
values[0x1]	67754587	1			T1	310		T2	41		T3	1597

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	122143190	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

151466048

1

T1

624

T2

139

T3

6422

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	896179	1			T1	7		T6	13		T7	717
valid_sources[0x01]	1769121	1			T1	2		T6	13		T7	635
valid_sources[0x02]	1275515	1			T1	4		T3	1		T6	11
valid_sources[0x03]	2156554	1			T1	2		T6	12		T7	678
valid_sources[0x04]	832734	1			T1	3		T6	6		T7	654
valid_sources[0x05]	1502469	1			T1	1		T6	7		T7	651
valid_sources[0x06]	829866	1			T1	4		T6	8		T7	634
valid_sources[0x07]	828221	1			T1	3		T6	8		T7	620
valid_sources[0x08]	1725337	1			T1	2		T3	1		T6	14
valid_sources[0x09]	829088	1			T1	1		T3	1		T6	11
valid_sources[0x0a]	1724958	1			T1	3		T6	12		T7	634
valid_sources[0x0b]	1680555	1			T1	3		T3	2		T6	12
valid_sources[0x0c]	908449	1			T1	3		T3	1		T6	6
valid_sources[0x0d]	829759	1			T1	4		T3	1		T6	13
valid_sources[0x0e]	1227750	1			T1	2		T6	5		T7	671
valid_sources[0x0f]	830433	1			T1	3		T6	10		T7	655
valid_sources[0x10]	822325	1			T1	3		T3	5		T6	13
valid_sources[0x11]	822578	1			T1	1		T3	2		T6	8
valid_sources[0x12]	1486742	1			T1	5		T3	1		T6	12
valid_sources[0x13]	873122	1			T1	1		T6	6		T7	648
valid_sources[0x14]	3178658	1			T1	2		T3	1		T6	16
valid_sources[0x15]	854067	1			T1	2		T6	15		T7	641
valid_sources[0x16]	818266	1			T1	2		T3	2		T6	13
valid_sources[0x17]	827516	1			T1	5		T6	13		T7	638
valid_sources[0x18]	826114	1			T1	3		T3	3		T6	14
valid_sources[0x19]	1495245	1			T3	2		T6	11		T7	631
valid_sources[0x1a]	863636	1			T1	2		T6	8		T7	660
valid_sources[0x1b]	828468	1			T1	4		T6	7		T7	633
valid_sources[0x1c]	874370	1			T1	2		T3	2		T6	13
valid_sources[0x1d]	875991	1			T1	3		T3	1		T6	16
valid_sources[0x1e]	1736840	1			T1	3		T3	1		T6	13
valid_sources[0x1f]	823562	1			T1	3		T3	3		T6	17
valid_sources[0x20]	973205	1			T1	4		T6	11		T7	683
valid_sources[0x21]	2314338	1			T1	4		T6	19		T31	1
valid_sources[0x22]	1140966	1			T1	3		T3	2		T6	8
valid_sources[0x23]	823266	1			T1	4		T3	2		T6	11
valid_sources[0x24]	835153	1			T1	3		T3	3		T6	14
valid_sources[0x25]	825756	1			T1	2		T6	12		T7	689
valid_sources[0x26]	1869194	1			T3	2		T6	11		T7	659
valid_sources[0x27]	820013	1			T1	4		T3	1		T6	10
valid_sources[0x28]	1027554	1			T1	3		T3	1		T6	9
valid_sources[0x29]	828433	1			T1	1		T3	2		T6	9
valid_sources[0x2a]	855148	1			T1	7		T3	3		T6	10
valid_sources[0x2b]	1478596	1			T1	1		T6	11		T7	639
valid_sources[0x2c]	826097	1			T1	3		T3	1		T6	11
valid_sources[0x2d]	871044	1			T3	1		T6	13		T7	631
valid_sources[0x2e]	1757682	1			T1	1		T3	3		T6	9
valid_sources[0x2f]	824150	1			T1	3		T3	1		T6	9
valid_sources[0x30]	1516993	1			T1	2		T3	1		T6	4
valid_sources[0x31]	920384	1			T1	3		T6	11		T7	690
valid_sources[0x32]	1372913	1			T1	6		T3	1		T6	8
valid_sources[0x33]	902650	1			T1	3		T6	11		T7	639
valid_sources[0x34]	824371	1			T3	2		T6	15		T7	590
valid_sources[0x35]	824096	1			T3	2		T6	7		T7	658
valid_sources[0x36]	859285	1			T1	2		T3	1		T6	9
valid_sources[0x37]	1026640	1			T1	4		T3	1		T6	16
valid_sources[0x38]	829525	1			T1	3		T6	17		T7	654
valid_sources[0x39]	829229	1			T1	6		T3	1		T6	7
valid_sources[0x3a]	826793	1			T1	2		T3	1		T6	10
valid_sources[0x3b]	1475745	1			T1	2		T6	10		T7	597
valid_sources[0x3c]	1080286	1			T1	5		T3	2		T6	17
valid_sources[0x3d]	2325542	1			T1	1		T6	18		T7	649
valid_sources[0x3e]	1000029	1			T1	1		T3	1		T6	7
valid_sources[0x3f]	847625	1			T1	3		T3	2		T6	12
valid_sources[0x40]	829476	1			T1	8		T3	2		T6	7
valid_sources[0x41]	824945	1			T3	1		T6	8		T7	696
valid_sources[0x42]	839532	1			T1	4		T3	2		T6	10
valid_sources[0x43]	1667773	1			T1	3		T6	11		T7	623
valid_sources[0x44]	1781297	1			T1	4		T6	16		T7	648
valid_sources[0x45]	1248685	1			T1	3		T3	2		T6	5
valid_sources[0x46]	823255	1			T1	4		T6	10		T7	661
valid_sources[0x47]	823847	1			T1	6		T3	2		T6	8
valid_sources[0x48]	1034316	1			T1	5		T3	3		T6	5
valid_sources[0x49]	827835	1			T1	5		T6	12		T7	648
valid_sources[0x4a]	829692	1			T1	3		T6	13		T7	590
valid_sources[0x4b]	906382	1			T1	4		T3	1		T6	13
valid_sources[0x4c]	834193	1			T1	1		T6	10		T7	660
valid_sources[0x4d]	830838	1			T1	4		T3	2		T6	9
valid_sources[0x4e]	1009796	1			T1	2		T3	2		T6	11
valid_sources[0x4f]	864648	1			T1	3		T3	1		T6	15
valid_sources[0x50]	824288	1			T3	1		T6	14		T7	638
valid_sources[0x51]	957956	1			T1	1		T6	7		T7	626
valid_sources[0x52]	872851	1			T1	1		T3	1		T6	13
valid_sources[0x53]	1490338	1			T1	4		T3	1		T6	8
valid_sources[0x54]	1186509	1			T1	3		T3	4		T6	13
valid_sources[0x55]	4228906	1			T1	1		T3	1		T6	10
valid_sources[0x56]	821345	1			T1	4		T3	2		T6	7
valid_sources[0x57]	833144	1			T1	2		T6	8		T7	609
valid_sources[0x58]	822038	1			T1	2		T6	16		T7	657
valid_sources[0x59]	830307	1			T1	4		T3	1		T6	12
valid_sources[0x5a]	821589	1			T1	4		T3	1		T6	12
valid_sources[0x5b]	834856	1			T1	2		T6	9		T7	661
valid_sources[0x5c]	834065	1			T1	1		T6	7		T7	647
valid_sources[0x5d]	832581	1			T1	4		T3	1		T6	8
valid_sources[0x5e]	823825	1			T1	1		T6	17		T7	662
valid_sources[0x5f]	1055256	1			T1	3		T3	2		T6	10
valid_sources[0x60]	871956	1			T1	2		T6	6		T7	616
valid_sources[0x61]	836672	1			T1	2		T3	1		T6	15
valid_sources[0x62]	877658	1			T1	3		T6	9		T7	617
valid_sources[0x63]	825477	1			T1	2		T3	1		T6	12
valid_sources[0x64]	837097	1			T1	7		T3	1		T6	16
valid_sources[0x65]	3225169	1			T1	7		T3	3		T6	10
valid_sources[0x66]	937091	1			T1	4		T3	1		T6	13
valid_sources[0x67]	824550	1			T1	1		T6	12		T7	664
valid_sources[0x68]	829101	1			T1	4		T3	2		T6	12
valid_sources[0x69]	821542	1			T1	3		T3	3		T6	9
valid_sources[0x6a]	826639	1			T1	2		T6	8		T7	619
valid_sources[0x6b]	874326	1			T1	1		T3	1		T6	8
valid_sources[0x6c]	818693	1			T1	3		T3	1		T6	7
valid_sources[0x6d]	892305	1			T1	3		T3	1		T6	5
valid_sources[0x6e]	1146813	1			T1	6		T3	2		T6	15
valid_sources[0x6f]	2773469	1			T1	2		T6	8		T7	626
valid_sources[0x70]	1678005	1			T1	3		T3	1		T6	11
valid_sources[0x71]	877178	1			T1	5		T6	12		T7	622
valid_sources[0x72]	828386	1			T1	3		T3	1		T6	14
valid_sources[0x73]	1671535	1			T1	2		T6	9		T7	666
valid_sources[0x74]	827889	1			T1	5		T3	1		T6	8
valid_sources[0x75]	1475286	1			T1	4		T3	1		T6	8
valid_sources[0x76]	822513	1			T1	2		T3	1		T6	6
valid_sources[0x77]	826147	1			T1	5		T6	12		T7	607
valid_sources[0x78]	823468	1			T1	3		T3	1		T6	9
valid_sources[0x79]	1525137	1			T1	2		T6	7		T7	642
valid_sources[0x7a]	829268	1			T1	3		T3	3		T6	7
valid_sources[0x7b]	825886	1			T3	2		T6	7		T7	660
valid_sources[0x7c]	823293	1			T1	2		T6	7		T31	1
valid_sources[0x7d]	1276972	1			T1	3		T3	3		T6	9
valid_sources[0x7e]	1689605	1			T1	2		T6	7		T7	663
valid_sources[0x7f]	832520	1			T3	2		T6	16		T7	659
valid_sources[0x80]	898180	1			T1	2		T3	1		T6	12

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

45244365

1

T1

16

T2

53

T3

3934

values[0x0]

all_enables

biggest_size

37998952

1

T1

257

T2

44

T3

873

values[0x1]

all_enables

biggest_size

33004150

1

T1

293

T2

38

T3

792