Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
178283 |
1 |
|
|
T6 |
1693 |
|
T8 |
202 |
|
T20 |
104 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
94769 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
61027 |
1 |
|
|
T6 |
54 |
|
T8 |
8 |
|
T20 |
103 |
seven_bytes |
3259 |
1 |
|
|
T6 |
42 |
|
T8 |
2 |
|
T21 |
57 |
six_bytes |
3252 |
1 |
|
|
T6 |
42 |
|
T8 |
5 |
|
T21 |
59 |
five_bytes |
3209 |
1 |
|
|
T6 |
47 |
|
T8 |
5 |
|
T21 |
57 |
four_bytes |
3199 |
1 |
|
|
T6 |
49 |
|
T8 |
5 |
|
T21 |
43 |
three_bytes |
3197 |
1 |
|
|
T6 |
36 |
|
T8 |
2 |
|
T21 |
58 |
two_bytes |
3196 |
1 |
|
|
T6 |
55 |
|
T8 |
5 |
|
T21 |
65 |
one_byte |
3175 |
1 |
|
|
T6 |
47 |
|
T8 |
3 |
|
T21 |
56 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174905 |
1 |
|
|
T6 |
1675 |
|
T8 |
200 |
|
T20 |
102 |
auto[1] |
3378 |
1 |
|
|
T6 |
18 |
|
T8 |
2 |
|
T20 |
2 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
178283 |
1 |
|
|
T6 |
1693 |
|
T8 |
202 |
|
T20 |
104 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
178266 |
1 |
|
|
T6 |
1693 |
|
T8 |
202 |
|
T20 |
104 |
auto[1] |
17 |
1 |
|
|
T15 |
1 |
|
T18 |
1 |
|
T170 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1168 |
1 |
|
|
T6 |
1 |
|
T20 |
1 |
|
T15 |
7 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3378 |
1 |
|
|
T6 |
18 |
|
T8 |
2 |
|
T20 |
2 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174469 |
1 |
|
|
T6 |
1068 |
|
T20 |
363 |
|
T15 |
296 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
87970 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
65733 |
1 |
|
|
T6 |
20 |
|
T20 |
358 |
|
T15 |
291 |
seven_bytes |
3006 |
1 |
|
|
T6 |
31 |
|
T21 |
67 |
|
T17 |
34 |
six_bytes |
2963 |
1 |
|
|
T6 |
28 |
|
T21 |
83 |
|
T17 |
29 |
five_bytes |
2985 |
1 |
|
|
T6 |
31 |
|
T21 |
62 |
|
T17 |
29 |
four_bytes |
2980 |
1 |
|
|
T6 |
34 |
|
T21 |
68 |
|
T17 |
30 |
three_bytes |
2910 |
1 |
|
|
T6 |
33 |
|
T21 |
73 |
|
T17 |
46 |
two_bytes |
2966 |
1 |
|
|
T6 |
36 |
|
T21 |
67 |
|
T17 |
25 |
one_byte |
2956 |
1 |
|
|
T6 |
30 |
|
T21 |
67 |
|
T17 |
35 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
171065 |
1 |
|
|
T6 |
1052 |
|
T20 |
353 |
|
T15 |
286 |
auto[1] |
3404 |
1 |
|
|
T6 |
16 |
|
T20 |
10 |
|
T15 |
10 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174469 |
1 |
|
|
T6 |
1068 |
|
T20 |
363 |
|
T15 |
296 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
174456 |
1 |
|
|
T6 |
1068 |
|
T20 |
363 |
|
T15 |
295 |
auto[1] |
13 |
1 |
|
|
T15 |
1 |
|
T19 |
1 |
|
T171 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1200 |
1 |
|
|
T6 |
3 |
|
T20 |
5 |
|
T15 |
5 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3404 |
1 |
|
|
T6 |
16 |
|
T20 |
10 |
|
T15 |
10 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
348905 |
1 |
|
|
T6 |
2657 |
|
T8 |
815 |
|
T20 |
529 |
auto[1] |
555 |
1 |
|
|
T9 |
65 |
|
T10 |
26 |
|
T11 |
12 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
183660 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
121777 |
1 |
|
|
T6 |
73 |
|
T8 |
17 |
|
T20 |
523 |
seven_bytes |
6360 |
1 |
|
|
T6 |
73 |
|
T8 |
23 |
|
T21 |
101 |
six_bytes |
6311 |
1 |
|
|
T6 |
75 |
|
T8 |
25 |
|
T21 |
120 |
five_bytes |
6345 |
1 |
|
|
T6 |
67 |
|
T8 |
26 |
|
T21 |
105 |
four_bytes |
6332 |
1 |
|
|
T6 |
74 |
|
T8 |
22 |
|
T21 |
117 |
three_bytes |
6283 |
1 |
|
|
T6 |
61 |
|
T8 |
28 |
|
T21 |
143 |
two_bytes |
6175 |
1 |
|
|
T6 |
60 |
|
T8 |
20 |
|
T21 |
123 |
one_byte |
6217 |
1 |
|
|
T6 |
83 |
|
T8 |
16 |
|
T21 |
111 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
342812 |
1 |
|
|
T6 |
2625 |
|
T8 |
807 |
|
T20 |
517 |
auto[1] |
6648 |
1 |
|
|
T6 |
32 |
|
T8 |
8 |
|
T20 |
12 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
349460 |
1 |
|
|
T6 |
2657 |
|
T8 |
815 |
|
T20 |
529 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
349434 |
1 |
|
|
T6 |
2657 |
|
T8 |
815 |
|
T20 |
529 |
auto[1] |
26 |
1 |
|
|
T104 |
1 |
|
T172 |
1 |
|
T9 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2262 |
1 |
|
|
T6 |
2 |
|
T8 |
2 |
|
T20 |
6 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
6648 |
1 |
|
|
T6 |
32 |
|
T8 |
8 |
|
T20 |
12 |