Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 213151901 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 153571276 1 T1 47478 T2 11834 T3 345687



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 191027261 1 T1 51851 T2 8545 T3 430639
values[0x0] 84476805 1 T1 13427 T2 2842 T3 210136
values[0x1] 91219111 1 T1 14216 T2 2892 T3 220748



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 165593921 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 201129256 1 T1 54805 T2 12500 T3 455050



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1277269 1 T1 344 T3 3481 T33 13
valid_sources[0x01] 1163302 1 T1 308 T2 1 T3 3150
valid_sources[0x02] 1149917 1 T1 316 T3 3441 T33 6
valid_sources[0x03] 2275703 1 T1 318 T2 1 T3 3263
valid_sources[0x04] 1158558 1 T1 299 T3 3293 T33 10
valid_sources[0x05] 1152445 1 T1 299 T2 3 T3 3451
valid_sources[0x06] 2086885 1 T1 283 T2 1 T3 3443
valid_sources[0x07] 1150278 1 T1 306 T3 3324 T33 6
valid_sources[0x08] 3073587 1 T1 310 T3 3472 T33 11
valid_sources[0x09] 1151766 1 T1 309 T2 2 T3 3533
valid_sources[0x0a] 1170197 1 T1 300 T3 3439 T33 10
valid_sources[0x0b] 1610280 1 T1 318 T3 3316 T33 8
valid_sources[0x0c] 1811750 1 T1 302 T2 3 T3 3280
valid_sources[0x0d] 2101169 1 T1 329 T3 3597 T33 8
valid_sources[0x0e] 1167473 1 T1 279 T3 3359 T33 10
valid_sources[0x0f] 1155024 1 T1 263 T2 2 T3 3565
valid_sources[0x10] 1159864 1 T1 282 T3 3382 T33 5
valid_sources[0x11] 1155292 1 T1 281 T2 2 T3 3500
valid_sources[0x12] 1231421 1 T1 297 T3 3520 T33 2
valid_sources[0x13] 1164520 1 T1 327 T2 1 T3 3293
valid_sources[0x14] 1155553 1 T1 310 T2 1 T3 3165
valid_sources[0x15] 1186866 1 T1 341 T2 1 T3 3297
valid_sources[0x16] 1159055 1 T1 322 T3 3238 T33 5
valid_sources[0x17] 1162570 1 T1 329 T2 2 T3 3331
valid_sources[0x18] 1152708 1 T1 310 T2 1 T3 3359
valid_sources[0x19] 1164129 1 T1 309 T3 3275 T33 9
valid_sources[0x1a] 1318423 1 T1 316 T3 3512 T33 16
valid_sources[0x1b] 1320412 1 T1 328 T3 3292 T33 10
valid_sources[0x1c] 1154290 1 T1 354 T2 2 T3 3354
valid_sources[0x1d] 1601867 1 T1 294 T3 3263 T33 3
valid_sources[0x1e] 1155300 1 T1 314 T2 1 T3 3322
valid_sources[0x1f] 1782698 1 T1 333 T2 2 T3 3321
valid_sources[0x20] 1157866 1 T1 286 T3 3136 T33 10
valid_sources[0x21] 1160575 1 T1 312 T2 1 T3 3625
valid_sources[0x22] 1159037 1 T1 312 T2 2 T3 3397
valid_sources[0x23] 1160679 1 T1 294 T2 1 T3 3284
valid_sources[0x24] 1250481 1 T1 348 T3 3240 T33 8
valid_sources[0x25] 1158989 1 T1 311 T2 1 T3 3381
valid_sources[0x26] 1161518 1 T1 299 T2 1 T3 3386
valid_sources[0x27] 2281617 1 T1 303 T3 3430 T33 12
valid_sources[0x28] 1158754 1 T1 326 T2 2 T3 3490
valid_sources[0x29] 1383890 1 T1 293 T2 1 T3 3462
valid_sources[0x2a] 1150837 1 T1 326 T3 3236 T33 7
valid_sources[0x2b] 1149687 1 T1 309 T3 3509 T33 11
valid_sources[0x2c] 1156465 1 T1 296 T2 1 T3 3168
valid_sources[0x2d] 1306228 1 T1 329 T2 2 T3 3369
valid_sources[0x2e] 1206489 1 T1 324 T2 1 T3 3471
valid_sources[0x2f] 1258262 1 T1 308 T3 3259 T33 9
valid_sources[0x30] 2059029 1 T1 292 T3 3589 T33 13
valid_sources[0x31] 1156006 1 T1 303 T2 1 T3 3265
valid_sources[0x32] 1157011 1 T1 311 T2 1 T3 3454
valid_sources[0x33] 1158510 1 T1 315 T3 3450 T33 8
valid_sources[0x34] 3737910 1 T1 282 T2 1 T3 3136
valid_sources[0x35] 1156166 1 T1 360 T2 4 T3 3387
valid_sources[0x36] 2146390 1 T1 315 T2 1 T3 3329
valid_sources[0x37] 1273396 1 T1 283 T2 4 T3 3289
valid_sources[0x38] 1225610 1 T1 302 T2 3 T3 3529
valid_sources[0x39] 1272357 1 T1 294 T3 3439 T33 4
valid_sources[0x3a] 3142818 1 T1 284 T2 1 T3 3257
valid_sources[0x3b] 1610075 1 T1 315 T2 1 T3 3417
valid_sources[0x3c] 1756527 1 T1 290 T3 3397 T33 10
valid_sources[0x3d] 1155987 1 T1 273 T2 2 T3 3475
valid_sources[0x3e] 3515858 1 T1 347 T2 1 T3 3424
valid_sources[0x3f] 1598902 1 T1 275 T3 3146 T33 8
valid_sources[0x40] 1824038 1 T1 335 T2 2 T3 3322
valid_sources[0x41] 3788821 1 T1 347 T3 3482 T33 4
valid_sources[0x42] 1153511 1 T1 323 T2 1 T3 3552
valid_sources[0x43] 1151314 1 T1 321 T2 1 T3 3269
valid_sources[0x44] 1152212 1 T1 302 T2 2 T3 3285
valid_sources[0x45] 1275098 1 T1 319 T3 3454 T33 11
valid_sources[0x46] 2051046 1 T1 297 T2 1 T3 3363
valid_sources[0x47] 2019835 1 T1 358 T2 1 T3 3422
valid_sources[0x48] 1154505 1 T1 310 T2 1 T3 3401
valid_sources[0x49] 1275364 1 T1 351 T2 3 T3 3484
valid_sources[0x4a] 1161104 1 T1 298 T2 1 T3 3267
valid_sources[0x4b] 1148611 1 T1 319 T2 3 T3 3418
valid_sources[0x4c] 1270658 1 T1 317 T3 3216 T33 5
valid_sources[0x4d] 1148466 1 T1 326 T3 3256 T33 7
valid_sources[0x4e] 1150922 1 T1 310 T3 3340 T33 10
valid_sources[0x4f] 1221519 1 T1 265 T3 3280 T33 4
valid_sources[0x50] 1155164 1 T1 284 T2 1 T3 3386
valid_sources[0x51] 1599336 1 T1 307 T3 3401 T33 6
valid_sources[0x52] 1159246 1 T1 304 T2 2 T3 3521
valid_sources[0x53] 1170422 1 T1 302 T3 3453 T33 8
valid_sources[0x54] 1152919 1 T1 317 T2 3 T3 3262
valid_sources[0x55] 1158650 1 T1 312 T2 1 T3 3209
valid_sources[0x56] 1278348 1 T1 300 T2 1 T3 3158
valid_sources[0x57] 1152174 1 T1 329 T2 1 T3 3612
valid_sources[0x58] 1201998 1 T1 303 T2 1 T3 3177
valid_sources[0x59] 1153757 1 T1 323 T2 1 T3 3340
valid_sources[0x5a] 1154836 1 T1 290 T3 3438 T33 3
valid_sources[0x5b] 1156431 1 T1 280 T3 3391 T33 4
valid_sources[0x5c] 2061717 1 T1 303 T2 1 T3 3339
valid_sources[0x5d] 1406099 1 T1 282 T3 3388 T33 6
valid_sources[0x5e] 1162492 1 T1 324 T3 3330 T33 15
valid_sources[0x5f] 1257580 1 T1 288 T3 3302 T33 11
valid_sources[0x60] 1255436 1 T1 326 T2 1 T3 3424
valid_sources[0x61] 1153639 1 T1 333 T2 1 T3 3346
valid_sources[0x62] 1151340 1 T1 310 T2 1 T3 3481
valid_sources[0x63] 1154157 1 T1 315 T2 4 T3 3281
valid_sources[0x64] 1599760 1 T1 279 T2 2 T3 3538
valid_sources[0x65] 1298156 1 T1 295 T2 1 T3 3302
valid_sources[0x66] 1150122 1 T1 302 T2 1 T3 3541
valid_sources[0x67] 1449533 1 T1 303 T2 1 T3 3369
valid_sources[0x68] 1158991 1 T1 315 T2 1 T3 3308
valid_sources[0x69] 1150764 1 T1 313 T2 1 T3 3287
valid_sources[0x6a] 1421785 1 T1 301 T2 1 T3 3257
valid_sources[0x6b] 1157852 1 T1 318 T2 1 T3 3282
valid_sources[0x6c] 1157290 1 T1 297 T3 3328 T33 5
valid_sources[0x6d] 1155681 1 T1 296 T3 3397 T33 5
valid_sources[0x6e] 1155280 1 T1 313 T2 1 T3 3455
valid_sources[0x6f] 1237318 1 T1 315 T3 3416 T33 9
valid_sources[0x70] 1212549 1 T1 306 T3 3498 T33 6
valid_sources[0x71] 1186627 1 T1 332 T3 3304 T33 5
valid_sources[0x72] 1159646 1 T1 300 T2 1 T3 3193
valid_sources[0x73] 2015121 1 T1 337 T2 1 T3 3336
valid_sources[0x74] 3115830 1 T1 293 T2 2 T3 3298
valid_sources[0x75] 3592073 1 T1 324 T3 3510 T33 11
valid_sources[0x76] 1247109 1 T1 329 T2 2 T3 3182
valid_sources[0x77] 2063729 1 T1 309 T3 3478 T33 7
valid_sources[0x78] 1151950 1 T1 301 T3 3370 T33 7
valid_sources[0x79] 1417241 1 T1 291 T2 1 T3 3344
valid_sources[0x7a] 1162573 1 T1 294 T2 2 T3 3220
valid_sources[0x7b] 1152226 1 T1 295 T3 3280 T33 6
valid_sources[0x7c] 1590482 1 T1 365 T2 1 T3 3428
valid_sources[0x7d] 1176590 1 T1 322 T2 4 T3 3446
valid_sources[0x7e] 1160688 1 T1 335 T2 1 T3 3391
valid_sources[0x7f] 1168965 1 T1 343 T2 1 T3 3371
valid_sources[0x80] 1979653 1 T1 333 T2 1 T3 3352



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 60026714 1 T1 31600 T2 7151 T3 111822
values[0x0] all_enables biggest_size 50208664 1 T1 8469 T2 2389 T3 126107
values[0x1] all_enables biggest_size 43335898 1 T1 7409 T2 2294 T3 107758

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%