Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_kmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 208627046 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 151804821 1 T1 285126 T2 96892 T3 2007



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 186896782 1 T1 375723 T2 110131 T3 1297
values[0x0] 83405120 1 T1 119546 T2 27096 T3 581
values[0x1] 90129965 1 T1 128560 T2 29128 T3 583



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 162086478 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 198345389 1 T1 367861 T2 112958 T3 2134



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1092358 1 T1 2455 T2 667 T3 12
valid_sources[0x01] 1091127 1 T1 2375 T2 560 T3 9
valid_sources[0x02] 1086779 1 T1 2416 T2 649 T3 6
valid_sources[0x03] 1127206 1 T1 2326 T2 688 T3 10
valid_sources[0x04] 1091137 1 T1 2510 T2 671 T3 16
valid_sources[0x05] 1090532 1 T1 2393 T2 653 T3 10
valid_sources[0x06] 3054259 1 T1 2361 T2 646 T3 10
valid_sources[0x07] 1093412 1 T1 2394 T2 774 T3 2
valid_sources[0x08] 1093339 1 T1 2519 T2 784 T3 14
valid_sources[0x09] 3447736 1 T1 2470 T2 590 T3 11
valid_sources[0x0a] 1090087 1 T1 2406 T2 682 T3 10
valid_sources[0x0b] 1112266 1 T1 2514 T2 699 T3 8
valid_sources[0x0c] 1181131 1 T1 2493 T2 857 T3 10
valid_sources[0x0d] 1948836 1 T1 2438 T2 714 T3 15
valid_sources[0x0e] 1095876 1 T1 2366 T2 661 T3 11
valid_sources[0x0f] 1912258 1 T1 2463 T2 635 T3 10
valid_sources[0x10] 1188044 1 T1 2413 T2 659 T3 8
valid_sources[0x11] 1948032 1 T1 2445 T2 615 T3 4
valid_sources[0x12] 1942147 1 T1 2451 T2 565 T3 16
valid_sources[0x13] 1090871 1 T1 2381 T2 669 T3 14
valid_sources[0x14] 1093207 1 T1 2504 T2 560 T3 5
valid_sources[0x15] 2607976 1 T1 2459 T2 631 T3 9
valid_sources[0x16] 1119500 1 T1 2391 T2 586 T3 14
valid_sources[0x17] 1107698 1 T1 2445 T2 633 T3 13
valid_sources[0x18] 1152285 1 T1 2435 T2 722 T3 11
valid_sources[0x19] 2033940 1 T1 2377 T2 658 T3 9
valid_sources[0x1a] 1099417 1 T1 2462 T2 625 T3 10
valid_sources[0x1b] 1108773 1 T1 2499 T2 612 T3 4
valid_sources[0x1c] 2065942 1 T1 2395 T2 578 T3 10
valid_sources[0x1d] 2979565 1 T1 2377 T2 629 T3 15
valid_sources[0x1e] 1090008 1 T1 2527 T2 587 T3 10
valid_sources[0x1f] 1306042 1 T1 2454 T2 563 T3 10
valid_sources[0x20] 1084798 1 T1 2467 T2 738 T3 5
valid_sources[0x21] 1094916 1 T1 2481 T2 609 T3 8
valid_sources[0x22] 1091720 1 T1 2485 T2 741 T3 12
valid_sources[0x23] 1092757 1 T1 2429 T2 659 T3 13
valid_sources[0x24] 1096368 1 T1 2584 T2 666 T3 9
valid_sources[0x25] 1565270 1 T1 2422 T2 698 T3 7
valid_sources[0x26] 1094657 1 T1 2419 T2 539 T3 6
valid_sources[0x27] 1599578 1 T1 2344 T2 661 T3 7
valid_sources[0x28] 1539356 1 T1 2373 T2 596 T3 12
valid_sources[0x29] 1096680 1 T1 2394 T2 658 T3 9
valid_sources[0x2a] 1094045 1 T1 2456 T2 652 T3 12
valid_sources[0x2b] 1095964 1 T1 2459 T2 697 T3 13
valid_sources[0x2c] 2018488 1 T1 2426 T2 634 T3 12
valid_sources[0x2d] 1987376 1 T1 2469 T2 609 T3 9
valid_sources[0x2e] 1109064 1 T1 2490 T2 592 T3 11
valid_sources[0x2f] 1239859 1 T1 2365 T2 649 T3 13
valid_sources[0x30] 1142486 1 T1 2422 T2 736 T3 14
valid_sources[0x31] 1094929 1 T1 2379 T2 632 T3 13
valid_sources[0x32] 1096474 1 T1 2345 T2 674 T3 10
valid_sources[0x33] 1094620 1 T1 2572 T2 652 T3 19
valid_sources[0x34] 1091098 1 T1 2480 T2 699 T3 2
valid_sources[0x35] 1096624 1 T1 2421 T2 616 T3 5
valid_sources[0x36] 3058156 1 T1 2470 T2 679 T3 9
valid_sources[0x37] 1098540 1 T1 2410 T2 654 T3 9
valid_sources[0x38] 1091121 1 T1 2370 T2 652 T3 7
valid_sources[0x39] 3913797 1 T1 2514 T2 700 T3 13
valid_sources[0x3a] 1151449 1 T1 2467 T2 525 T3 5
valid_sources[0x3b] 1738567 1 T1 2469 T2 650 T3 15
valid_sources[0x3c] 1963416 1 T1 2350 T2 703 T3 12
valid_sources[0x3d] 2203106 1 T1 2423 T2 598 T3 6
valid_sources[0x3e] 1093767 1 T1 2412 T2 733 T3 6
valid_sources[0x3f] 1086327 1 T1 2435 T2 581 T3 9
valid_sources[0x40] 1220432 1 T1 2459 T2 725 T3 18
valid_sources[0x41] 1086896 1 T1 2508 T2 581 T3 12
valid_sources[0x42] 1097342 1 T1 2399 T2 563 T3 12
valid_sources[0x43] 1371433 1 T1 2483 T2 656 T3 19
valid_sources[0x44] 1311647 1 T1 2493 T2 542 T3 5
valid_sources[0x45] 1095376 1 T1 2394 T2 640 T3 7
valid_sources[0x46] 1545604 1 T1 2432 T2 626 T3 12
valid_sources[0x47] 2033229 1 T1 2464 T2 593 T3 8
valid_sources[0x48] 2002105 1 T1 2401 T2 661 T3 8
valid_sources[0x49] 1089891 1 T1 2359 T2 730 T3 12
valid_sources[0x4a] 3994903 1 T1 2399 T2 613 T3 6
valid_sources[0x4b] 1117761 1 T1 2401 T2 628 T3 15
valid_sources[0x4c] 2059395 1 T1 2402 T2 728 T3 8
valid_sources[0x4d] 1190148 1 T1 2340 T2 618 T3 7
valid_sources[0x4e] 1094862 1 T1 2414 T2 699 T3 11
valid_sources[0x4f] 1138954 1 T1 2445 T2 669 T3 6
valid_sources[0x50] 1110793 1 T1 2440 T2 713 T3 9
valid_sources[0x51] 1089414 1 T1 2415 T2 593 T3 8
valid_sources[0x52] 1101824 1 T1 2442 T2 563 T3 6
valid_sources[0x53] 1099892 1 T1 2497 T2 643 T3 12
valid_sources[0x54] 1940514 1 T1 2478 T2 680 T3 13
valid_sources[0x55] 1092770 1 T1 2429 T2 675 T3 6
valid_sources[0x56] 1098122 1 T1 2463 T2 604 T3 13
valid_sources[0x57] 1093421 1 T1 2360 T2 745 T3 11
valid_sources[0x58] 1159860 1 T1 2438 T2 651 T3 9
valid_sources[0x59] 1350960 1 T1 2377 T2 701 T3 12
valid_sources[0x5a] 1100959 1 T1 2510 T2 592 T3 7
valid_sources[0x5b] 3102469 1 T1 2420 T2 614 T3 15
valid_sources[0x5c] 1094173 1 T1 2584 T2 587 T3 9
valid_sources[0x5d] 1092095 1 T1 2493 T2 728 T3 14
valid_sources[0x5e] 1097863 1 T1 2416 T2 572 T3 16
valid_sources[0x5f] 1095628 1 T1 2449 T2 646 T3 10
valid_sources[0x60] 1094147 1 T1 2425 T2 721 T3 9
valid_sources[0x61] 1966348 1 T1 2393 T2 566 T3 11
valid_sources[0x62] 1093969 1 T1 2487 T2 726 T3 15
valid_sources[0x63] 1091262 1 T1 2356 T2 722 T3 11
valid_sources[0x64] 1100528 1 T1 2550 T2 594 T3 14
valid_sources[0x65] 1097132 1 T1 2500 T2 667 T3 10
valid_sources[0x66] 1092909 1 T1 2446 T2 557 T3 7
valid_sources[0x67] 1748034 1 T1 2432 T2 653 T3 11
valid_sources[0x68] 1092600 1 T1 2363 T2 639 T3 10
valid_sources[0x69] 1997085 1 T1 2484 T2 589 T3 8
valid_sources[0x6a] 1094884 1 T1 2393 T2 676 T3 8
valid_sources[0x6b] 1091447 1 T1 2530 T2 568 T3 9
valid_sources[0x6c] 1965199 1 T1 2467 T2 637 T3 7
valid_sources[0x6d] 1150375 1 T1 2389 T2 579 T3 6
valid_sources[0x6e] 2014732 1 T1 2407 T2 585 T3 6
valid_sources[0x6f] 1093506 1 T1 2524 T2 636 T3 10
valid_sources[0x70] 1095748 1 T1 2429 T2 679 T3 11
valid_sources[0x71] 1089788 1 T1 2385 T2 546 T3 11
valid_sources[0x72] 1174110 1 T1 2498 T2 615 T3 6
valid_sources[0x73] 1996828 1 T1 2444 T2 618 T3 7
valid_sources[0x74] 1089288 1 T1 2461 T2 609 T3 13
valid_sources[0x75] 1176098 1 T1 2504 T2 649 T3 12
valid_sources[0x76] 1558619 1 T1 2321 T2 661 T3 10
valid_sources[0x77] 2450914 1 T1 2424 T2 651 T3 6
valid_sources[0x78] 1092530 1 T1 2455 T2 695 T3 3
valid_sources[0x79] 1233862 1 T1 2495 T2 677 T3 8
valid_sources[0x7a] 1097518 1 T1 2404 T2 559 T3 10
valid_sources[0x7b] 1838452 1 T1 2467 T2 728 T3 11
valid_sources[0x7c] 1963829 1 T1 2377 T2 709 T3 3
valid_sources[0x7d] 1256029 1 T1 2407 T2 639 T3 15
valid_sources[0x7e] 1096156 1 T1 2413 T2 650 T3 7
valid_sources[0x7f] 1219507 1 T1 2423 T2 666 T3 15
valid_sources[0x80] 1093699 1 T1 2555 T2 700 T3 8



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 59138831 1 T1 126324 T2 65628 T3 1037
values[0x0] all_enables biggest_size 49714911 1 T1 82778 T2 16733 T3 492
values[0x1] all_enables biggest_size 42951079 1 T1 76024 T2 14531 T3 478

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%