Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
198982 |
1 |
|
|
T3 |
717 |
|
T12 |
114 |
|
T20 |
122 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
108177 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
65018 |
1 |
|
|
T3 |
707 |
|
T12 |
113 |
|
T20 |
121 |
seven_bytes |
3655 |
1 |
|
|
T15 |
32 |
|
T17 |
18 |
|
T59 |
63 |
six_bytes |
3715 |
1 |
|
|
T15 |
39 |
|
T17 |
23 |
|
T59 |
77 |
five_bytes |
3693 |
1 |
|
|
T15 |
33 |
|
T17 |
25 |
|
T59 |
74 |
four_bytes |
3771 |
1 |
|
|
T15 |
44 |
|
T17 |
23 |
|
T59 |
82 |
three_bytes |
3695 |
1 |
|
|
T15 |
38 |
|
T17 |
17 |
|
T59 |
67 |
two_bytes |
3648 |
1 |
|
|
T15 |
39 |
|
T17 |
21 |
|
T59 |
57 |
one_byte |
3610 |
1 |
|
|
T15 |
41 |
|
T17 |
22 |
|
T59 |
50 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
195264 |
1 |
|
|
T3 |
697 |
|
T12 |
112 |
|
T20 |
120 |
auto[1] |
3718 |
1 |
|
|
T3 |
20 |
|
T12 |
2 |
|
T20 |
2 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
198982 |
1 |
|
|
T3 |
717 |
|
T12 |
114 |
|
T20 |
122 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
198967 |
1 |
|
|
T3 |
716 |
|
T12 |
114 |
|
T20 |
122 |
auto[1] |
15 |
1 |
|
|
T3 |
1 |
|
T181 |
1 |
|
T182 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1237 |
1 |
|
|
T3 |
10 |
|
T12 |
1 |
|
T20 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3718 |
1 |
|
|
T3 |
20 |
|
T12 |
2 |
|
T20 |
2 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for app_err
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180213 |
1 |
|
|
T3 |
554 |
|
T20 |
32 |
|
T41 |
263 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
93794 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
64314 |
1 |
|
|
T3 |
547 |
|
T20 |
31 |
|
T41 |
260 |
seven_bytes |
3232 |
1 |
|
|
T15 |
40 |
|
T21 |
5 |
|
T17 |
49 |
six_bytes |
3153 |
1 |
|
|
T15 |
31 |
|
T21 |
5 |
|
T17 |
48 |
five_bytes |
3169 |
1 |
|
|
T15 |
27 |
|
T21 |
4 |
|
T17 |
48 |
four_bytes |
3191 |
1 |
|
|
T15 |
40 |
|
T21 |
4 |
|
T17 |
54 |
three_bytes |
3101 |
1 |
|
|
T15 |
35 |
|
T21 |
7 |
|
T17 |
49 |
two_bytes |
3134 |
1 |
|
|
T15 |
31 |
|
T21 |
2 |
|
T17 |
58 |
one_byte |
3125 |
1 |
|
|
T15 |
31 |
|
T21 |
6 |
|
T17 |
46 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
176714 |
1 |
|
|
T3 |
540 |
|
T20 |
30 |
|
T41 |
257 |
auto[1] |
3499 |
1 |
|
|
T3 |
14 |
|
T20 |
2 |
|
T41 |
6 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180213 |
1 |
|
|
T3 |
554 |
|
T20 |
32 |
|
T41 |
263 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
180201 |
1 |
|
|
T3 |
554 |
|
T20 |
32 |
|
T41 |
263 |
auto[1] |
12 |
1 |
|
|
T183 |
2 |
|
T184 |
1 |
|
T10 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
1198 |
1 |
|
|
T3 |
7 |
|
T20 |
1 |
|
T41 |
3 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
3499 |
1 |
|
|
T3 |
14 |
|
T20 |
2 |
|
T41 |
6 |
Summary for Variable app_err
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for app_err
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
372011 |
1 |
|
|
T3 |
1685 |
|
T7 |
85 |
|
T20 |
72 |
auto[1] |
684 |
1 |
|
|
T9 |
86 |
|
T10 |
75 |
|
T11 |
72 |
Summary for Variable data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
8 |
0 |
8 |
100.00 |
User Defined Bins for data_strb
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
196105 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
full_data_beat |
129642 |
1 |
|
|
T3 |
1657 |
|
T7 |
84 |
|
T20 |
71 |
seven_bytes |
6727 |
1 |
|
|
T15 |
79 |
|
T21 |
12 |
|
T17 |
83 |
six_bytes |
6548 |
1 |
|
|
T15 |
56 |
|
T21 |
12 |
|
T17 |
65 |
five_bytes |
6709 |
1 |
|
|
T15 |
70 |
|
T21 |
23 |
|
T17 |
71 |
four_bytes |
6760 |
1 |
|
|
T15 |
60 |
|
T21 |
19 |
|
T17 |
84 |
three_bytes |
6867 |
1 |
|
|
T15 |
68 |
|
T21 |
20 |
|
T17 |
77 |
two_bytes |
6616 |
1 |
|
|
T15 |
62 |
|
T21 |
18 |
|
T17 |
71 |
one_byte |
6721 |
1 |
|
|
T15 |
61 |
|
T21 |
12 |
|
T17 |
62 |
Summary for Variable done
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for done
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
365673 |
1 |
|
|
T3 |
1629 |
|
T7 |
83 |
|
T20 |
70 |
auto[1] |
7022 |
1 |
|
|
T3 |
56 |
|
T7 |
2 |
|
T20 |
2 |
Summary for Variable in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
1 |
1 |
50.00 |
Automatically Generated Bins for in_keccak_rounds
Uncovered bins
NAME | COUNT | AT LEAST | NUMBER | STATUS |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
372695 |
1 |
|
|
T3 |
1685 |
|
T7 |
85 |
|
T20 |
72 |
Summary for Variable single_data_beat
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for single_data_beat
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
372669 |
1 |
|
|
T3 |
1685 |
|
T7 |
85 |
|
T20 |
72 |
auto[1] |
26 |
1 |
|
|
T15 |
1 |
|
T78 |
1 |
|
T63 |
1 |
Summary for Cross partial_data_on_last_beat
Samples crossed: done data_strb
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for partial_data_on_last_beat
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
2408 |
1 |
|
|
T3 |
28 |
|
T7 |
1 |
|
T20 |
1 |
Summary for Cross done_in_keccak_rounds
Samples crossed: done in_keccak_rounds
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
User Defined Cross Bins |
1 |
0 |
1 |
100.00 |
|
User Defined Cross Bins for done_in_keccak_rounds
Excluded/Illegal bins
NAME | COUNT | STATUS |
invalid |
0 |
Excluded |
Covered bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
valid |
7022 |
1 |
|
|
T3 |
56 |
|
T7 |
2 |
|
T20 |
2 |